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lvzhengyang
riscv-gcc-1
Commits
af4a697f
Commit
af4a697f
authored
Apr 08, 1992
by
Michael Meissner
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*** empty log message ***
From-SVN: r702
parent
0ea674bc
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Showing
4 changed files
with
19 additions
and
40 deletions
+19
-40
gcc/config/mips/mips.c
+0
-28
gcc/config/mips/mips.h
+1
-3
gcc/config/mips/mips.md
+6
-6
gcc/halfpic.h
+12
-3
No files found.
gcc/config/mips/mips.c
View file @
af4a697f
...
@@ -590,34 +590,6 @@ simple_memory_operand (op, mode)
...
@@ -590,34 +590,6 @@ simple_memory_operand (op, mode)
return
FALSE
;
return
FALSE
;
}
}
/* Return true if the address is suitable for function call. */
int
call_memory_operand
(
op
,
mode
)
rtx
op
;
enum
machine_mode
mode
;
{
rtx
addr
;
enum
rtx_code
code
;
if
(
GET_CODE
(
op
)
!=
MEM
)
return
FALSE
;
addr
=
XEXP
(
op
,
0
);
code
=
GET_CODE
(
addr
);
if
(
GET_MODE
(
addr
)
!=
FUNCTION_MODE
)
return
FALSE
;
if
(
code
==
REG
||
code
==
SUBREG
)
return
TRUE
;
if
(
CONSTANT_ADDRESS_P
(
addr
))
return
TRUE
;
return
FALSE
;
}
/* Return true if the code of this rtx pattern is EQ or NE. */
/* Return true if the code of this rtx pattern is EQ or NE. */
int
int
...
...
gcc/config/mips/mips.h
View file @
af4a697f
...
@@ -105,7 +105,6 @@ extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
...
@@ -105,7 +105,6 @@ extern struct rtx_def *mips_load_reg4; /* 4th reg to check for load delay */
extern
void
abort_with_insn
();
extern
void
abort_with_insn
();
extern
int
arith32_operand
();
extern
int
arith32_operand
();
extern
int
arith_operand
();
extern
int
arith_operand
();
extern
int
call_memory_operand
();
extern
int
cmp_op
();
extern
int
cmp_op
();
extern
int
cmp2_op
();
extern
int
cmp2_op
();
extern
unsigned
long
compute_frame_size
();
extern
unsigned
long
compute_frame_size
();
...
@@ -1992,7 +1991,7 @@ __enable_execute_stack (addr) \
...
@@ -1992,7 +1991,7 @@ __enable_execute_stack (addr) \
addition to `const_int' and `const_double' expressions. */
addition to `const_int' and `const_double' expressions. */
#define CONSTANT_ADDRESS_P(X) \
#define CONSTANT_ADDRESS_P(X) \
(CONSTANT_P (X) && (!HALF_PIC_P () || HALF_PIC_ADDRESS_P (X)))
(CONSTANT_P (X) && (!HALF_PIC_P () ||
!
HALF_PIC_ADDRESS_P (X)))
/* Nonzero if the constant value X is a legitimate general operand.
/* Nonzero if the constant value X is a legitimate general operand.
...
@@ -2449,7 +2448,6 @@ while (0)
...
@@ -2449,7 +2448,6 @@ while (0)
{"md_register_operand", { REG }}, \
{"md_register_operand", { REG }}, \
{"mips_const_double_ok", { CONST_DOUBLE }}, \
{"mips_const_double_ok", { CONST_DOUBLE }}, \
{"simple_memory_operand", { MEM, SUBREG }}, \
{"simple_memory_operand", { MEM, SUBREG }}, \
{"call_memory_operand", { MEM, SUBREG }}, \
{"equality_op", { EQ, NE }}, \
{"equality_op", { EQ, NE }}, \
{"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
{"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
LTU, LEU }}, \
LTU, LEU }}, \
...
...
gcc/config/mips/mips.md
View file @
af4a697f
...
@@ -3540,7 +3540,7 @@ move\\t%0,%z4\\n\\
...
@@ -3540,7 +3540,7 @@ move\\t%0,%z4\\n\\
;; calls.c now passes a third argument, make saber happy
;; calls.c now passes a third argument, make saber happy
(define_expand "call"
(define_expand "call"
[
(parallel
[
(call (match_operand 0 "
call_
memory_operand" "m")
[
(parallel
[
(call (match_operand 0 "memory_operand" "m")
(match_operand 1 "" "i"))
(match_operand 1 "" "i"))
(clobber (match_operand 2 "" ""))])] ;; overwrite op2 with $31
(clobber (match_operand 2 "" ""))])] ;; overwrite op2 with $31
""
""
...
@@ -3551,12 +3551,12 @@ move\\t%0,%z4\\n\\
...
@@ -3551,12 +3551,12 @@ move\\t%0,%z4\\n\\
operands
[
2
]
= gen_rtx (REG, SImode, GP_REG_FIRST + 31);
operands
[
2
]
= gen_rtx (REG, SImode, GP_REG_FIRST + 31);
addr = XEXP (operands
[
0
]
, 0);
addr = XEXP (operands
[
0
]
, 0);
if (
! call_memory_operand (addr, VOIDmode
))
if (
GET_CODE (addr) != REG && !CONSTANT_ADDRESS_P (addr
))
XEXP (operands
[
0
]
, 0) = force_reg (FUNCTION_MODE, addr);
XEXP (operands
[
0
]
, 0) = force_reg (FUNCTION_MODE, addr);
}")
}")
(define_insn "call_internal"
(define_insn "call_internal"
[
(call (match_operand 0 "
call_
memory_operand" "m")
[
(call (match_operand 0 "memory_operand" "m")
(match_operand 1 "" "i"))
(match_operand 1 "" "i"))
(clobber (match_operand:SI 2 "register_operand" "=d"))]
(clobber (match_operand:SI 2 "register_operand" "=d"))]
""
""
...
@@ -3582,7 +3582,7 @@ move\\t%0,%z4\\n\\
...
@@ -3582,7 +3582,7 @@ move\\t%0,%z4\\n\\
(define_expand "call_value"
(define_expand "call_value"
[
(parallel
[
(set (match_operand 0 "register_operand" "=df")
[
(parallel
[
(set (match_operand 0 "register_operand" "=df")
(call (match_operand 1 "
call_
memory_operand" "m")
(call (match_operand 1 "memory_operand" "m")
(match_operand 2 "" "i")))
(match_operand 2 "" "i")))
(clobber (match_operand 3 "" ""))])] ;; overwrite op3 with $31
(clobber (match_operand 3 "" ""))])] ;; overwrite op3 with $31
""
""
...
@@ -3593,13 +3593,13 @@ move\\t%0,%z4\\n\\
...
@@ -3593,13 +3593,13 @@ move\\t%0,%z4\\n\\
operands
[
3
]
= gen_rtx (REG, SImode, GP_REG_FIRST + 31);
operands
[
3
]
= gen_rtx (REG, SImode, GP_REG_FIRST + 31);
addr = XEXP (operands
[
1
]
, 0);
addr = XEXP (operands
[
1
]
, 0);
if (
! call_memory_operand (addr, VOIDmode
))
if (
GET_CODE (addr) != REG && !CONSTANT_ADDRESS_P (addr
))
XEXP (operands
[
1
]
, 0) = force_reg (FUNCTION_MODE, addr);
XEXP (operands
[
1
]
, 0) = force_reg (FUNCTION_MODE, addr);
}")
}")
(define_insn "call_value_internal"
(define_insn "call_value_internal"
[
(set (match_operand 0 "register_operand" "=df")
[
(set (match_operand 0 "register_operand" "=df")
(call (match_operand 1 "
call_
memory_operand" "m")
(call (match_operand 1 "memory_operand" "m")
(match_operand 2 "" "i")))
(match_operand 2 "" "i")))
(clobber (match_operand:SI 3 "register_operand" "=d"))]
(clobber (match_operand:SI 3 "register_operand" "=d"))]
""
""
...
...
gcc/halfpic.h
View file @
af4a697f
...
@@ -17,10 +17,12 @@ You should have received a copy of the GNU General Public License
...
@@ -17,10 +17,12 @@ You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
extern
int
flag_half_pic
;
/* Global half-pic flag. */
extern
int
flag_half_pic
;
/* Global half-pic flag. */
extern
void
half_pic_encode
();
/* encode whether half-pic */
extern
void
half_pic_encode
();
/* encode whether half-pic */
extern
void
half_pic_init
();
/* half_pic initialization */
extern
void
half_pic_init
();
/* half_pic initialization */
extern
int
half_pic_address_p
();
/* true if an address is half-pic */
extern
void
half_pic_finish
();
/* half_pic termination */
extern
int
half_pic_address_p
();
/* true if an address is half-pic */
extern
struct
rtx_def
*
half_pic_ptr
();
/* return RTX for half-pic pointer */
/* Macros to provide access to the half-pic stuff (so they can easily
/* Macros to provide access to the half-pic stuff (so they can easily
be stubbed out. */
be stubbed out. */
...
@@ -28,4 +30,11 @@ extern int half_pic_address_p (); /* true if an address is half-pic */
...
@@ -28,4 +30,11 @@ extern int half_pic_address_p (); /* true if an address is half-pic */
#define HALF_PIC_P() (flag_half_pic)
#define HALF_PIC_P() (flag_half_pic)
#define HALF_PIC_ENCODE(DECL) half_pic_encode (DECL)
#define HALF_PIC_ENCODE(DECL) half_pic_encode (DECL)
#define HALF_PIC_INIT() half_pic_init ()
#define HALF_PIC_INIT() half_pic_init ()
#define HALF_PIC_ADDRESS_P(X) (flag_half_pic && half_pic_address_p (X))
#define HALF_PIC_FINISH(STREAM) half_pic_finish (STREAM)
#define HALF_PIC_ADDRESS_P(X) half_pic_address_p (X)
#define HALF_PIC_PTR(X) half_pic_ptr (X)
/* Prefix for half-pic names */
#ifndef HALF_PIC_PREFIX
#define HALF_PIC_PREFIX "__pic_"
#endif
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