Commit af30facd by Aldy Hernandez Committed by Aldy Hernandez

frv.md: Add fr400_integer automaton.

        * config/frv/frv.md: Add fr400_integer automaton. Don't
        allow TYPE_MUL, TYPE_MACC, or TYPE_CUT to issue in parallel
        to TYPE_MACC.

From-SVN: r94272
parent b2802a4b
2005-01-26 Aldy Hernandez <aldyh@redhat.com>
2004-11-11 Eric Christopher <echristo@redhat.com>
* config/frv/frv.md: Add fr400_integer automaton. Don't
allow TYPE_MUL, TYPE_MACC, or TYPE_CUT to issue in parallel
to TYPE_MACC.
2005-01-26 Steven Bosscher <stevenb@suse.de> 2005-01-26 Steven Bosscher <stevenb@suse.de>
PR middle-end/16585 PR middle-end/16585
......
...@@ -768,6 +768,9 @@ ...@@ -768,6 +768,9 @@
;; of memory unit collision in the same packet. There's only one divide ;; of memory unit collision in the same packet. There's only one divide
;; unit too. ;; unit too.
(define_automaton "fr400_integer")
(define_cpu_unit "fr400_mul" "fr400_integer")
(define_insn_reservation "fr400_i1_int" 1 (define_insn_reservation "fr400_i1_int" 1
(and (eq_attr "cpu" "fr400,fr405,fr450") (and (eq_attr "cpu" "fr400,fr405,fr450")
(eq_attr "type" "int")) (eq_attr "type" "int"))
...@@ -788,18 +791,18 @@ ...@@ -788,18 +791,18 @@
(define_insn_reservation "fr400_i1_mul" 3 (define_insn_reservation "fr400_i1_mul" 3
(and (eq_attr "cpu" "fr400,fr405") (and (eq_attr "cpu" "fr400,fr405")
(eq_attr "type" "mul")) (eq_attr "type" "mul"))
"i0") "i0 + fr400_mul")
(define_insn_reservation "fr450_i1_mul" 2 (define_insn_reservation "fr450_i1_mul" 2
(and (eq_attr "cpu" "fr450") (and (eq_attr "cpu" "fr450")
(eq_attr "type" "mul")) (eq_attr "type" "mul"))
"i0") "i0 + fr400_mul")
(define_bypass 1 "fr400_i1_macc" "fr400_i1_macc") (define_bypass 1 "fr400_i1_macc" "fr400_i1_macc")
(define_insn_reservation "fr400_i1_macc" 2 (define_insn_reservation "fr400_i1_macc" 2
(and (eq_attr "cpu" "fr405,fr450") (and (eq_attr "cpu" "fr405,fr450")
(eq_attr "type" "macc")) (eq_attr "type" "macc"))
"i0|i1") "(i0|i1) + fr400_mul")
(define_insn_reservation "fr400_i1_scan" 1 (define_insn_reservation "fr400_i1_scan" 1
(and (eq_attr "cpu" "fr400,fr405,fr450") (and (eq_attr "cpu" "fr400,fr405,fr450")
...@@ -809,7 +812,7 @@ ...@@ -809,7 +812,7 @@
(define_insn_reservation "fr400_i1_cut" 2 (define_insn_reservation "fr400_i1_cut" 2
(and (eq_attr "cpu" "fr405,fr450") (and (eq_attr "cpu" "fr405,fr450")
(eq_attr "type" "cut")) (eq_attr "type" "cut"))
"i0") "i0 + fr400_mul")
;; 20 is for a write-after-write hazard. ;; 20 is for a write-after-write hazard.
(define_insn_reservation "fr400_i1_div" 20 (define_insn_reservation "fr400_i1_div" 20
......
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