Fix compile time warnings.

Improve target CPU selection.

From-SVN: r25824

gcc/ChangeLog

+Wed Mar 17 14:41:41 1999  Nick Clifton  <nickc@cygnus.com>
+
+	* config/arm/aout.h (ASM_GENERATE_INTERNAL_LABEL): Fix compile
+	time warning. 	
+	* config/arm/arm.md: Fix various compile time warnings.
+	* config/arm/arm.h: Fix various compile time warnings.  Add
+	function prototypes.
+	* config/arm/arm.c: Fix various compile time warnings.
+	(arm_override_options): Reorganise to seperate tuning from
+	targetting.
+	(bit_count): New function: Return a count of the number of bits
+	set in a word.
+
 Wed Mar 17 21:29:12 1999  J"orn Rennecke <amylaar@cygnus.co.uk>
 
 	* reload1.c (eliminate_regs): Don't keep REG_DEAD notes around for

gcc/config/arm/aout.h

@@ -148,7 +148,7 @@ do {					\
 /* Make an internal label into a string.  */
 #ifndef ASM_GENERATE_INTERNAL_LABEL
 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
-  sprintf (STRING, "*%s%s%d", LOCAL_LABEL_PREFIX, PREFIX, NUM)
+  sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
 #endif
      
 /* Nothing special is done about jump tables */

gcc/config/arm/arm.md

@@ -2403,7 +2403,7 @@
   "arm_arch4"
   "*
   /* If the address is invalid, this will split the instruction into two. */
-  if (bad_signed_byte_operand(operands[1], QImode))
+  if (bad_signed_byte_operand (operands[1], QImode))
     return \"#\";
   return \"ldr%?sb\\t%0, %1\";
 "
@@ -2476,7 +2476,7 @@
   "arm_arch4"
   "*
   /* If the address is invalid, this will split the instruction into two. */
-  if (bad_signed_byte_operand(operands[1], QImode))
+  if (bad_signed_byte_operand (operands[1], QImode))
     return \"#\";
   return \"ldr%?sb\\t%0, %1\";
 "
@@ -2638,7 +2638,7 @@
 
 (define_insn "*movsi_insn"
   [(set (match_operand:SI 0 "general_operand" "=r,r,r,m")
-	(match_operand:SI 1 "general_operand"  "rI,K,mi,r"))]
+	(match_operand:SI 1 "general_operand" "rI,K,mi,r"))]
   "register_operand (operands[0], SImode)
    || register_operand (operands[1], SImode)"
   "@
@@ -2852,8 +2852,6 @@
   ""
   "
 {
-  rtx insn;
-
   if (! (reload_in_progress || reload_completed))
     {
       if (GET_CODE (operands[0]) == MEM)
@@ -3068,7 +3066,6 @@
 ")
 
 ;; Pattern to recognise insn generated default case above
-
 (define_insn "*movhi_insn_arch4"
   [(set (match_operand:HI 0 "general_operand" "=r,r,r,m")
 	(match_operand:HI 1 "general_operand"  "rI,K,m,r"))]
@@ -3289,10 +3286,9 @@
        || register_operand (operands[1], DFmode))"
   "*
 {
-  rtx ops[3];
-
   switch (which_alternative)
     {
+    default:
     case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\";
     case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\";
     case 2: case 3: case 4: return output_move_double (operands);
@@ -3337,6 +3333,7 @@
   "*
   switch (which_alternative)
     {
+    default:
     case 0: return \"mvf%?e\\t%0, %1\";
     case 1: return \"mnf%?e\\t%0, #%N1\";
     case 2: return \"ldf%?e\\t%0, %1\";
@@ -6223,7 +6220,6 @@
   "*
 {
   char pattern[100];
-  int i;
 
   sprintf (pattern, \"sfmfd\\t%%1, %d, [%%m0]!\", XVECLEN (operands[2], 0));
   output_asm_insn (pattern, operands);