Skip to content

R
riscv-gcc-1
Commit ad4f9e7e by Richard Henderson Committed by Richard Henderson
Options

i386.md (btsq, btrq, btcq): Fix modes. 

        * config/i386/i386.md (btsq, btrq, btcq): Fix modes.
        (bt peepholes): Likewise.

From-SVN: r92534
parent d5606ec9
Showing with 15 additions and 12 deletions
gcc/ChangeLog
2004-12-22 Richard Henderson <rth@redhat.com> 2004-12-22 Richard Henderson <rth@redhat.com>
* config/i386/i386.md (btsq, btrq, btcq): Fix modes.
(bt peepholes): Likewise.
* varasm.c (force_const_mem): Call set_mem_align. * varasm.c (force_const_mem): Call set_mem_align.
2004-12-22 Richard Henderson <rth@redhat.com> 2004-12-22 Richard Henderson <rth@redhat.com>
......
gcc/config/i386/i386.md
...@@ -12218,9 +12218,9 @@ ...@@ -12218,9 +12218,9 @@
;; negdf respectively, so they can never be disabled entirely. ;; negdf respectively, so they can never be disabled entirely.
(define_insn "*btsq" (define_insn "*btsq"
[(set (zero_extract:DI (match_operand 0 "register_operand" "+r") [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r")
(const_int 1) (const_int 1)
(match_operand 1 "const_0_to_63_operand" "")) (match_operand:DI 1 "const_0_to_63_operand" ""))
(const_int 1)) (const_int 1))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && (TARGET_USE_BT || reload_completed)" "TARGET_64BIT && (TARGET_USE_BT || reload_completed)"
...@@ -12228,9 +12228,9 @@ ...@@ -12228,9 +12228,9 @@
[(set_attr "type" "alu1")]) [(set_attr "type" "alu1")])
(define_insn "*btrq" (define_insn "*btrq"
[(set (zero_extract:DI (match_operand 0 "register_operand" "+r") [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r")
(const_int 1) (const_int 1)
(match_operand 1 "const_0_to_63_operand" "")) (match_operand:DI 1 "const_0_to_63_operand" ""))
(const_int 0)) (const_int 0))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && (TARGET_USE_BT || reload_completed)" "TARGET_64BIT && (TARGET_USE_BT || reload_completed)"
...@@ -12238,9 +12238,9 @@ ...@@ -12238,9 +12238,9 @@
[(set_attr "type" "alu1")]) [(set_attr "type" "alu1")])
(define_insn "*btcq" (define_insn "*btcq"
[(set (zero_extract:DI (match_operand 0 "register_operand" "+r") [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+r")
(const_int 1) (const_int 1)
(match_operand 1 "const_0_to_63_operand" "")) (match_operand:DI 1 "const_0_to_63_operand" ""))
(not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1)))) (not:DI (zero_extract:DI (match_dup 0) (const_int 1) (match_dup 1))))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && (TARGET_USE_BT || reload_completed)" "TARGET_64BIT && (TARGET_USE_BT || reload_completed)"
...@@ -12252,9 +12252,9 @@ ...@@ -12252,9 +12252,9 @@
(define_peephole2 (define_peephole2
[(match_scratch:DI 2 "r") [(match_scratch:DI 2 "r")
(parallel [(set (zero_extract:DI (parallel [(set (zero_extract:DI
(match_operand 0 "register_operand" "") (match_operand:DI 0 "register_operand" "")
(const_int 1) (const_int 1)
(match_operand 1 "const_0_to_63_operand" "")) (match_operand:DI 1 "const_0_to_63_operand" ""))
(const_int 1)) (const_int 1))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"TARGET_64BIT && !TARGET_USE_BT" "TARGET_64BIT && !TARGET_USE_BT"
...@@ -12284,9 +12284,9 @@ ...@@ -12284,9 +12284,9 @@
(define_peephole2 (define_peephole2
[(match_scratch:DI 2 "r") [(match_scratch:DI 2 "r")
(parallel [(set (zero_extract:DI (parallel [(set (zero_extract:DI
(match_operand 0 "register_operand" "") (match_operand:DI 0 "register_operand" "")
(const_int 1) (const_int 1)
(match_operand 1 "const_0_to_63_operand" "")) (match_operand:DI 1 "const_0_to_63_operand" ""))
(const_int 0)) (const_int 0))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"TARGET_64BIT && !TARGET_USE_BT" "TARGET_64BIT && !TARGET_USE_BT"
...@@ -12316,9 +12316,9 @@ ...@@ -12316,9 +12316,9 @@
(define_peephole2 (define_peephole2
[(match_scratch:DI 2 "r") [(match_scratch:DI 2 "r")
(parallel [(set (zero_extract:DI (parallel [(set (zero_extract:DI
(match_operand 0 "register_operand" "") (match_operand:DI 0 "register_operand" "")
(const_int 1) (const_int 1)
(match_operand 1 "const_0_to_63_operand" "")) (match_operand:DI 1 "const_0_to_63_operand" ""))
(not:DI (zero_extract:DI (not:DI (zero_extract:DI
(match_dup 0) (const_int 1) (match_dup 1)))) (match_dup 0) (const_int 1) (match_dup 1))))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment