Commit ad111b8e by Jeff Law Committed by Jeff Law

v850.md (divmodhi4): Make sure to sign extend the dividend to 32 bits.

	* config/v850/v850.md (divmodhi4): Make sure to sign extend the
	dividend to 32 bits.  Adjust length.
	(udivmodhi4): Cleanup output template.  Fix length.

From-SVN: r262022
parent 3e85d885
2018-06-25 Jeff Law <law@redhat.com>
* config/v850/v850.md (divmodhi4): Make sure to sign extend the
dividend to 32 bits. Adjust length.
(udivmodhi4): Cleanup output template. Fix length.
2018-06-25 Carl Love <cel@us.ibm.com>
* config/rs6000/vsx.md: Change word selector to prefered location.
......
......@@ -738,13 +738,13 @@
(match_dup 2)))
(clobber (reg:CC CC_REGNUM))]
"TARGET_V850E_UP"
"divh %2,%0,%3"
[(set_attr "length" "4")
"sxh %0\n\tdivh %2,%0,%3"
[(set_attr "length" "6")
(set_attr "cc" "clobber")
(set_attr "type" "div")])
;; Half-words are sign-extended by default, so we must zero extend to a word
;; here before doing the divide.
;; The half word needs to be zero/sign extended to 32 bits before doing
;; the division/modulo operation.
(define_insn "udivmodhi4"
[(set (match_operand:HI 0 "register_operand" "=r")
......@@ -755,8 +755,8 @@
(match_dup 2)))
(clobber (reg:CC CC_REGNUM))]
"TARGET_V850E_UP"
"zxh %0 ; divhu %2,%0,%3"
[(set_attr "length" "4")
"zxh %0\n\tdivhu %2,%0,%3"
[(set_attr "length" "6")
(set_attr "cc" "clobber")
(set_attr "type" "div")])
......
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