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riscv-gcc-1
Commit acaaf0c6 by Uros Bizjak
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i386.md (frndintxf2): Rename to ... 

        * config/i386/i386.md (frndintxf2): Rename to ...
        (rintxf2): ... this. Remove expander having same name.
        (rintsf2, rintdf2): Implement using SSEMODEF macro.
        (roundsf2, rounddf2): Ditto.
        (lrint<mode>di2, lrint<mode>si2): Implement using SSEMODEI24 macro.
        (lround<mode>di2, lround<mode>si2): Ditto.

From-SVN: r122815
parent f9aa54d3
Showing with 59 additions and 114 deletions
gcc/ChangeLog
2007-03-11 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (frndintxf2): Rename to ...
(rintxf2): ... this. Remove expander having same name.
(rintsf2, rintdf2): Implement using SSEMODEF macro.
(roundsf2, rounddf2): Ditto.
(lrint<mode>di2, lrint<mode>si2): Implement using SSEMODEI24 macro.
(lround<mode>di2, lround<mode>si2): Ditto.
2007-03-11 Steven Bosscher <steven@gcc.gnu.org> 2007-03-11 Steven Bosscher <steven@gcc.gnu.org>
* lower-subreg.c: Include except.h. * lower-subreg.c: Include except.h.
...@@ -41,9 +50,9 @@ ...@@ -41,9 +50,9 @@
* config/i386/i386.md (UNSPEC_C2_FLAG): New constant. * config/i386/i386.md (UNSPEC_C2_FLAG): New constant.
(fpremxf4_i387, fprem1xf4_i387): Use UNSPEC_C2_FLAG. (fpremxf4_i387, fprem1xf4_i387): Use UNSPEC_C2_FLAG.
(fmodxf3, fmod<mode>3, remainderxf3, remainder<mode>3): (fmodxf3, fmod<mode>3, remainderxf3, remainder<mode>3):
Add LABEL_NUSES to emmitted label. Add LABEL_NUSES to emitted label.
* config/i386/i386.c (ix86_emit_fp_unordered_jump): Add * config/i386/i386.c (ix86_emit_fp_unordered_jump): Add
branch probability value to emmitted jump insn. branch probability value to emitted jump insn.
* reg-stack.c (subst_stack_regs_pat)[UNSPEC]: Handle UNSPEC_C2_FLAG. * reg-stack.c (subst_stack_regs_pat)[UNSPEC]: Handle UNSPEC_C2_FLAG.
Do not check life information and do not re-arrange input operands Do not check life information and do not re-arrange input operands
for UNSPEC_FSCALE_EXP, UNSPEC_FPREM_U and UNSPEC_FPREM1_U. for UNSPEC_FSCALE_EXP, UNSPEC_FPREM_U and UNSPEC_FPREM1_U.
...@@ -160,10 +169,10 @@ ...@@ -160,10 +169,10 @@
2007-03-09 Aldy Hernandez <aldyh@redhat.com> 2007-03-09 Aldy Hernandez <aldyh@redhat.com>
PR tree-optimization/30375 PR tree-optimization/30375
* tree-ssa-dse.c (dse_possible_dead_store_p): Do not eliminate if * tree-ssa-dse.c (dse_possible_dead_store_p): Do not eliminate if
LHS of statements is not the same. LHS of statements is not the same.
* testsuite/gcc.dg/tree-ssa/ssa-dse-10.c: New. * testsuite/gcc.dg/tree-ssa/ssa-dse-10.c: New.
2007-03-09 Chao-ying Fu <fu@mips.com> 2007-03-09 Chao-ying Fu <fu@mips.com>
...@@ -618,10 +627,11 @@ ...@@ -618,10 +627,11 @@
x86_sse_unaligned_move_optimal, x86_sse_typeless_stores, x86_sse_unaligned_move_optimal, x86_sse_typeless_stores,
x86_sse_load0_by_pxor, x86_use_ffreep, x86_use_incdec, x86_sse_load0_by_pxor, x86_use_ffreep, x86_use_incdec,
x86_inter_unit_moves, x86_ext_80387_constants, x86_four_jump_limit, x86_inter_unit_moves, x86_ext_80387_constants, x86_four_jump_limit,
x86_schedule, x86_use_bt, x86_pad_returns): Merge into ... x86_schedule, x86_use_bt, x86_pad_returns,
x86_use_xchgb): Merge into ...
(ix86_tune_features): ... here. New array. (ix86_tune_features): ... here. New array.
(x86_cmove, x86_use_xchgb, x86_cmpxchg, x86_cmpxchg8b, (x86_cmove, x86_cmpxchg, x86_cmpxchg8b, x86_xadd,
x86_xadd, x86_bswap): Merge into ... x86_bswap): Merge into ...
(ix86_arch_features): ... here. New array. (ix86_arch_features): ... here. New array.
(x86_3dnow_a): Remove. (x86_3dnow_a): Remove.
(x86_accumulate_outgoing_args): Make static. (x86_accumulate_outgoing_args): Make static.
...@@ -875,7 +885,7 @@ ...@@ -875,7 +885,7 @@
2007-03-05 Mike Stump <mrs@apple.com> 2007-03-05 Mike Stump <mrs@apple.com>
* c-common.c (targetcm): Add. * c-common.c (targetcm): Add.
* c-opts.c (c_common_handle_option): Handle language specific * c-opts.c (c_common_handle_option): Handle language specific
target options. target options.
* opts.c (handle_option): Verify language for target options, if * opts.c (handle_option): Verify language for target options, if
......
gcc/config/i386/i386.md
...@@ -17318,54 +17318,28 @@ ...@@ -17318,54 +17318,28 @@
}) })
(define_insn "frndintxf2" (define_insn "rintxf2"
[(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 1 "register_operand" "0")] (unspec:XF [(match_operand:XF 1 "register_operand" "0")]
UNSPEC_FRNDINT))] UNSPEC_FRNDINT))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
"frndint" "frndint"
[(set_attr "type" "fpspc") [(set_attr "type" "fpspc")
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_expand "rintdf2" (define_expand "rint<mode>2"
[(use (match_operand:DF 0 "register_operand" "")) [(use (match_operand:SSEMODEF 0 "register_operand" ""))
(use (match_operand:DF 1 "register_operand" ""))] (use (match_operand:SSEMODEF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387
&& (!(TARGET_SSE2 && TARGET_SSE_MATH) || TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math
&& !optimize_size)"
{
if (SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math
&& !optimize_size)
ix86_expand_rint (operand0, operand1);
else
{
rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode);
emit_insn (gen_extenddfxf2 (op1, operands[1]));
emit_insn (gen_frndintxf2 (op0, op1));
emit_insn (gen_truncxfdf2_i387_noop (operands[0], op0));
}
DONE;
})
(define_expand "rintsf2"
[(use (match_operand:SF 0 "register_operand" ""))
(use (match_operand:SF 1 "register_operand" ""))]
"(TARGET_USE_FANCY_MATH_387 "(TARGET_USE_FANCY_MATH_387
&& (!TARGET_SSE_MATH || TARGET_MIX_SSE_I387) && (!(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
|| TARGET_MIX_SSE_I387)
&& flag_unsafe_math_optimizations) && flag_unsafe_math_optimizations)
|| (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math
&& !optimize_size)" && !optimize_size)"
{ {
if (SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_trapping_math
&& !optimize_size) && !optimize_size)
ix86_expand_rint (operand0, operand1); ix86_expand_rint (operand0, operand1);
...@@ -17374,43 +17348,22 @@ ...@@ -17374,43 +17348,22 @@
rtx op0 = gen_reg_rtx (XFmode); rtx op0 = gen_reg_rtx (XFmode);
rtx op1 = gen_reg_rtx (XFmode); rtx op1 = gen_reg_rtx (XFmode);
emit_insn (gen_extendsfxf2 (op1, operands[1])); emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
emit_insn (gen_frndintxf2 (op0, op1)); emit_insn (gen_rintxf2 (op0, op1));
emit_insn (gen_truncxfsf2_i387_noop (operands[0], op0)); emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
} }
DONE; DONE;
}) })
(define_expand "rintxf2" (define_expand "round<mode>2"
[(use (match_operand:XF 0 "register_operand" "")) [(match_operand:SSEMODEF 0 "register_operand" "")
(use (match_operand:XF 1 "register_operand" ""))] (match_operand:SSEMODEF 1 "nonimmediate_operand" "")]
"TARGET_USE_FANCY_MATH_387 "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& flag_unsafe_math_optimizations && !optimize_size"
{
emit_insn (gen_frndintxf2 (operands[0], operands[1]));
DONE;
})
(define_expand "roundsf2"
[(match_operand:SF 0 "register_operand" "")
(match_operand:SF 1 "nonimmediate_operand" "")]
"SSE_FLOAT_MODE_P (SFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_rounding_math
&& !optimize_size"
{
ix86_expand_round (operand0, operand1);
DONE;
})
(define_expand "rounddf2"
[(match_operand:DF 0 "register_operand" "")
(match_operand:DF 1 "nonimmediate_operand" "")]
"SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH
&& !flag_trapping_math && !flag_rounding_math && !flag_trapping_math && !flag_rounding_math
&& !optimize_size" && !optimize_size"
{ {
if (TARGET_64BIT) if ((<MODE>mode != DFmode) || TARGET_64BIT)
ix86_expand_round (operand0, operand1); ix86_expand_round (operand0, operand1);
else else
ix86_expand_rounddf_32 (operand0, operand1); ix86_expand_rounddf_32 (operand0, operand1);
...@@ -17420,7 +17373,7 @@ ...@@ -17420,7 +17373,7 @@
(define_insn_and_split "*fistdi2_1" (define_insn_and_split "*fistdi2_1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r") [(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r")
(unspec:DI [(match_operand:XF 1 "register_operand" "f,f")] (unspec:DI [(match_operand:XF 1 "register_operand" "f,f")]
UNSPEC_FIST))] UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& !(reload_completed || reload_in_progress)" && !(reload_completed || reload_in_progress)"
"#" "#"
...@@ -17443,7 +17396,7 @@ ...@@ -17443,7 +17396,7 @@
(define_insn "fistdi2" (define_insn "fistdi2"
[(set (match_operand:DI 0 "memory_operand" "=m") [(set (match_operand:DI 0 "memory_operand" "=m")
(unspec:DI [(match_operand:XF 1 "register_operand" "f")] (unspec:DI [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_scratch:XF 2 "=&1f"))] (clobber (match_scratch:XF 2 "=&1f"))]
"TARGET_USE_FANCY_MATH_387" "TARGET_USE_FANCY_MATH_387"
"* return output_fix_trunc (insn, operands, 0);" "* return output_fix_trunc (insn, operands, 0);"
...@@ -17453,7 +17406,7 @@ ...@@ -17453,7 +17406,7 @@
(define_insn "fistdi2_with_temp" (define_insn "fistdi2_with_temp"
[(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r") [(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r")
(unspec:DI [(match_operand:XF 1 "register_operand" "f,f")] (unspec:DI [(match_operand:XF 1 "register_operand" "f,f")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:DI 2 "memory_operand" "=m,m")) (clobber (match_operand:DI 2 "memory_operand" "=m,m"))
(clobber (match_scratch:XF 3 "=&1f,&1f"))] (clobber (match_scratch:XF 3 "=&1f,&1f"))]
"TARGET_USE_FANCY_MATH_387" "TARGET_USE_FANCY_MATH_387"
...@@ -17464,7 +17417,7 @@ ...@@ -17464,7 +17417,7 @@
(define_split (define_split
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(unspec:DI [(match_operand:XF 1 "register_operand" "")] (unspec:DI [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:DI 2 "memory_operand" "")) (clobber (match_operand:DI 2 "memory_operand" ""))
(clobber (match_scratch 3 ""))] (clobber (match_scratch 3 ""))]
"reload_completed" "reload_completed"
...@@ -17476,7 +17429,7 @@ ...@@ -17476,7 +17429,7 @@
(define_split (define_split
[(set (match_operand:DI 0 "memory_operand" "") [(set (match_operand:DI 0 "memory_operand" "")
(unspec:DI [(match_operand:XF 1 "register_operand" "")] (unspec:DI [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:DI 2 "memory_operand" "")) (clobber (match_operand:DI 2 "memory_operand" ""))
(clobber (match_scratch 3 ""))] (clobber (match_scratch 3 ""))]
"reload_completed" "reload_completed"
...@@ -17487,7 +17440,7 @@ ...@@ -17487,7 +17440,7 @@
(define_insn_and_split "*fist<mode>2_1" (define_insn_and_split "*fist<mode>2_1"
[(set (match_operand:X87MODEI12 0 "register_operand" "=r") [(set (match_operand:X87MODEI12 0 "register_operand" "=r")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST))] UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387 "TARGET_USE_FANCY_MATH_387
&& !(reload_completed || reload_in_progress)" && !(reload_completed || reload_in_progress)"
"#" "#"
...@@ -17505,7 +17458,7 @@ ...@@ -17505,7 +17458,7 @@
(define_insn "fist<mode>2" (define_insn "fist<mode>2"
[(set (match_operand:X87MODEI12 0 "memory_operand" "=m") [(set (match_operand:X87MODEI12 0 "memory_operand" "=m")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST))] UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387" "TARGET_USE_FANCY_MATH_387"
"* return output_fix_trunc (insn, operands, 0);" "* return output_fix_trunc (insn, operands, 0);"
[(set_attr "type" "fpspc") [(set_attr "type" "fpspc")
...@@ -17514,7 +17467,7 @@ ...@@ -17514,7 +17467,7 @@
(define_insn "fist<mode>2_with_temp" (define_insn "fist<mode>2_with_temp"
[(set (match_operand:X87MODEI12 0 "register_operand" "=r") [(set (match_operand:X87MODEI12 0 "register_operand" "=r")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")] (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "f")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:X87MODEI12 2 "memory_operand" "=m"))] (clobber (match_operand:X87MODEI12 2 "memory_operand" "=m"))]
"TARGET_USE_FANCY_MATH_387" "TARGET_USE_FANCY_MATH_387"
"#" "#"
...@@ -17524,60 +17477,42 @@ ...@@ -17524,60 +17477,42 @@
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "register_operand" "") [(set (match_operand:X87MODEI12 0 "register_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:X87MODEI12 2 "memory_operand" ""))] (clobber (match_operand:X87MODEI12 2 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(set (match_dup 2) (unspec:X87MODEI12 [(match_dup 1)] [(set (match_dup 2) (unspec:X87MODEI12 [(match_dup 1)] UNSPEC_FIST))
UNSPEC_FIST))
(set (match_dup 0) (match_dup 2))] (set (match_dup 0) (match_dup 2))]
"") "")
(define_split (define_split
[(set (match_operand:X87MODEI12 0 "memory_operand" "") [(set (match_operand:X87MODEI12 0 "memory_operand" "")
(unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")] (unspec:X87MODEI12 [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST)) UNSPEC_FIST))
(clobber (match_operand:X87MODEI12 2 "memory_operand" ""))] (clobber (match_operand:X87MODEI12 2 "memory_operand" ""))]
"reload_completed" "reload_completed"
[(set (match_dup 0) (unspec:X87MODEI12 [(match_dup 1)] [(set (match_dup 0) (unspec:X87MODEI12 [(match_dup 1)] UNSPEC_FIST))]
UNSPEC_FIST))]
"") "")
(define_expand "lrintxf<mode>2" (define_expand "lrintxf<mode>2"
[(set (match_operand:X87MODEI 0 "nonimmediate_operand" "") [(set (match_operand:X87MODEI 0 "nonimmediate_operand" "")
(unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")] (unspec:X87MODEI [(match_operand:XF 1 "register_operand" "")]
UNSPEC_FIST))] UNSPEC_FIST))]
"TARGET_USE_FANCY_MATH_387" "TARGET_USE_FANCY_MATH_387"
"") "")
(define_expand "lrint<mode>di2" (define_expand "lrint<SSEMODEF:mode><SSEMODEI24:mode>2"
[(set (match_operand:DI 0 "nonimmediate_operand" "") [(set (match_operand:SSEMODEI24 0 "nonimmediate_operand" "")
(unspec:DI [(match_operand:SSEMODEF 1 "register_operand" "")] (unspec:SSEMODEI24 [(match_operand:SSEMODEF 1 "register_operand" "")]
UNSPEC_FIX_NOTRUNC))] UNSPEC_FIX_NOTRUNC))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT" "SSE_FLOAT_MODE_P (<SSEMODEF:MODE>mode) && TARGET_SSE_MATH
&& ((<SSEMODEI24:MODE>mode != DImode) || TARGET_64BIT)"
"") "")
(define_expand "lrint<mode>si2" (define_expand "lround<SSEMODEF:mode><SSEMODEI24:mode>2"
[(set (match_operand:SI 0 "nonimmediate_operand" "") [(match_operand:SSEMODEI24 0 "nonimmediate_operand" "")
(unspec:SI [(match_operand:SSEMODEF 1 "register_operand" "")]
UNSPEC_FIX_NOTRUNC))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"")
(define_expand "lround<mode>di2"
[(match_operand:DI 0 "nonimmediate_operand" "")
(match_operand:SSEMODEF 1 "register_operand" "")]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH && TARGET_64BIT
&& !flag_trapping_math && !flag_rounding_math
&& !optimize_size"
{
ix86_expand_lround (operand0, operand1);
DONE;
})
(define_expand "lround<mode>si2"
[(match_operand:SI 0 "nonimmediate_operand" "")
(match_operand:SSEMODEF 1 "register_operand" "")] (match_operand:SSEMODEF 1 "register_operand" "")]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& ((<SSEMODEI24:MODE>mode != DImode) || TARGET_64BIT)
&& !flag_trapping_math && !flag_rounding_math && !flag_trapping_math && !flag_rounding_math
&& !optimize_size" && !optimize_size"
{ {
......
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