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riscv-gcc-1
Commit ac9e2cff by Andrew Pinski Committed by Andrew Pinski
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darwin.md: Delete the altivec patterns which are handled differently now. 

2004-08-18  Andrew Pinski  <apinski@apple.com>

        * config/rs6000/darwin.md: Delete the altivec patterns which are
        handled differently now.
        (load_macho_picbase_di): Make sure that is only happens for TARGET_64BIT
        (macho_correct_pic_di): Likewise.
        (call_indirect_nonlocal_darwin64): Likewise.
        Delete the save world/saveFP/saveVec patterns.

        Revert the reversion of: 2004-08-16  Stan Shebs  <shebs@apple.com>
        * config/darwin.c (macho_indirect_data_reference): Add DImode case.
        * config/rs6000/rs6000.md: Include darwin.md.
        (builtin_setjmp_receiver): Add DImode case.
        * config/rs6000/rs6000.c (rs6000_emit_move): Add DImode case to
        Darwin bits.

From-SVN: r86204
parent 92b9a671
Showing with 47 additions and 113 deletions
gcc/ChangeLog
2004-08-18 Andrew Pinski <apinski@apple.com>
* config/rs6000/darwin.md: Delete the altivec patterns which are
handled differently now.
(load_macho_picbase_di): Make sure that is only happens for TARGET_64BIT
(macho_correct_pic_di): Likewise.
(call_indirect_nonlocal_darwin64): Likewise.
Delete the save world/saveFP/saveVec patterns.
Revert the reversion of: 2004-08-16 Stan Shebs <shebs@apple.com>
* config/darwin.c (macho_indirect_data_reference): Add DImode case.
* config/rs6000/rs6000.md: Include darwin.md.
(builtin_setjmp_receiver): Add DImode case.
* config/rs6000/rs6000.c (rs6000_emit_move): Add DImode case to
Darwin bits.
2004-08-18 Matt Austern <austern@apple.com>
Dead code stripping
......@@ -62,8 +78,8 @@
2004-08-18 Andrew Pinski <apinski@apple.com>
* config/darwin.c (machopic_legitimize_pic_address): Only set MEM_READONLY_P
in the non TARGET_TOC case.
* config/darwin.c (machopic_legitimize_pic_address): Only set
MEM_READONLY_P in the non TARGET_TOC case.
2004-08-18 Zack Weinberg <zack@codesourcery.com>
......
gcc/config/darwin.c
......@@ -333,8 +333,12 @@ machopic_indirect_data_reference (rtx orig, rtx reg)
if (defined && MACHO_DYNAMIC_NO_PIC_P)
{
#if defined (TARGET_TOC)
emit_insn (gen_macho_high (reg, orig));
emit_insn (gen_macho_low (reg, reg, orig));
emit_insn (GET_MODE (orig) == DImode
? gen_macho_high_di (reg, orig)
: gen_macho_high (reg, orig));
emit_insn (GET_MODE (orig) == DImode
? gen_macho_low_di (reg, reg, orig)
: gen_macho_low (reg, reg, orig));
#else
/* some other cpu -- writeme! */
abort ();
......@@ -529,7 +533,9 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
rtx asym = XEXP (orig, 0);
rtx mem;
emit_insn (gen_macho_high (temp_reg, asym));
emit_insn (mode == DImode
? gen_macho_high_di (temp_reg, asym)
: gen_macho_high (temp_reg, asym));
mem = gen_rtx_MEM (GET_MODE (orig),
gen_rtx_LO_SUM (Pmode, temp_reg, asym));
MEM_READONLY_P (mem) = 1;
......
gcc/config/rs6000/darwin.md
......@@ -145,55 +145,10 @@ Boston, MA 02111-1307, USA. */
(match_dup 2))]
"")
(define_insn ""
[(set (mem:V4SI (plus:DI (match_operand:DI 0 "gpc_reg_operand" "b,r")
(match_operand:DI 1 "gpc_reg_operand" "r,b")))
(match_operand:V4SI 2 "register_operand" "v,v"))]
"TARGET_MACHO && TARGET_64BIT"
"@
stvx %2,%0,%1
stvx %2,%1,%0"
[(set_attr "type" "vecstore")])
(define_insn ""
[(set (mem:V4SI (match_operand:DI 0 "gpc_reg_operand" "r"))
(match_operand:V4SI 1 "register_operand" "v"))]
"TARGET_MACHO && TARGET_64BIT"
"stvx %1,0,%0"
[(set_attr "type" "vecstore")])
(define_split
[(set (match_operand:V4SI 0 "register_operand" "")
(mem:V4SI (plus:DI (match_operand:DI 1 "gpc_reg_operand" "")
(match_operand:DI 2 "short_cint_operand" ""))))
(clobber (match_operand:DI 3 "gpc_reg_operand" ""))]
"TARGET_MACHO && TARGET_64BIT"
[(set (match_dup 3) (plus:DI (match_dup 1) (match_dup 2)))
(set (match_dup 0)
(mem:V4SI (match_dup 3)))]
"")
(define_insn ""
[(set (match_operand:V4SI 0 "register_operand" "=v,v")
(mem:V4SI (plus:DI (match_operand:DI 1 "gpc_reg_operand" "b,r")
(match_operand:DI 2 "gpc_reg_operand" "r,b"))))]
"TARGET_MACHO && TARGET_64BIT"
"@
lvx %0,%1,%2
lvx %0,%2,%1"
[(set_attr "type" "vecload")])
(define_insn ""
[(set (match_operand:V4SI 0 "register_operand" "=v")
(mem:V4SI (match_operand:DI 1 "gpc_reg_operand" "r")))]
"TARGET_MACHO && TARGET_64BIT"
"lvx %0,0,%1"
[(set_attr "type" "vecload")])
(define_insn "load_macho_picbase_di"
[(set (match_operand:DI 0 "register_operand" "=l")
(unspec:DI [(match_operand:DI 1 "immediate_operand" "s")] 15))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
"bcl 20,31,%1\\n%1:"
[(set_attr "type" "branch")
(set_attr "length" "4")])
......@@ -204,7 +159,7 @@ Boston, MA 02111-1307, USA. */
(unspec:DI [(match_operand:DI 2 "immediate_operand" "s")
(match_operand:DI 3 "immediate_operand" "s")]
16)))]
"DEFAULT_ABI == ABI_DARWIN"
"DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
"addis %0,%1,ha16(%2-%3)\n\taddi %0,%0,lo16(%2-%3)"
[(set_attr "length" "8")])
......@@ -213,7 +168,7 @@ Boston, MA 02111-1307, USA. */
(match_operand 1 "" "g,g,g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
(clobber (match_scratch:SI 3 "=l,l,l,l"))]
"DEFAULT_ABI == ABI_DARWIN"
"DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
{
return "b%T0l";
}
......@@ -338,59 +293,3 @@ Boston, MA 02111-1307, USA. */
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*save_fpregs_with_label_di"
[(match_parallel 0 "any_operand"
[(clobber (match_operand:DI 1 "register_operand" "=l"))
(use (match_operand:DI 2 "call_operand" "s"))
(use (match_operand:DI 3 "" ""))
(set (match_operand:DF 4 "memory_operand" "=m")
(match_operand:DF 5 "gpc_reg_operand" "f"))])]
"TARGET_64BIT"
"*
#if TARGET_MACHO
const char *picbase = machopic_function_base_name ();
operands[3] = gen_rtx_SYMBOL_REF (Pmode, ggc_alloc_string (picbase, -1));
#endif
return \"bl %z2\\n%3:\";
"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*save_vregs_di"
[(match_parallel 0 "any_operand"
[(clobber (match_operand:DI 1 "register_operand" "=l"))
(use (match_operand:DI 2 "call_operand" "s"))
(set (match_operand:V4SI 3 "any_operand" "=m")
(match_operand:V4SI 4 "register_operand" "v"))])]
"TARGET_64BIT"
"bl %z2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*restore_vregs_di"
[(match_parallel 0 "any_operand"
[(clobber (match_operand:DI 1 "register_operand" "=l"))
(use (match_operand:DI 2 "call_operand" "s"))
(clobber (match_operand:DI 3 "gpc_reg_operand" "=r"))
(set (match_operand:V4SI 4 "register_operand" "=v")
(match_operand:V4SI 5 "any_operand" "m"))])]
"TARGET_64BIT"
"bl %z2")
(define_insn "*save_vregs_with_label_di"
[(match_parallel 0 "any_operand"
[(clobber (match_operand:DI 1 "register_operand" "=l"))
(use (match_operand:DI 2 "call_operand" "s"))
(use (match_operand:DI 3 "" ""))
(set (match_operand:V4SI 4 "any_operand" "=m")
(match_operand:V4SI 5 "register_operand" "v"))])]
"TARGET_64BIT"
"*
#if TARGET_MACHO
const char *picbase = machopic_function_base_name ();
operands[3] = gen_rtx_SYMBOL_REF (Pmode, ggc_alloc_string (picbase, -1));
#endif
return \"bl %z2\\n%3:\";
"
[(set_attr "type" "branch")
(set_attr "length" "4")])
gcc/config/rs6000/rs6000.c
......@@ -4322,8 +4322,16 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
return;
}
#endif
emit_insn (gen_macho_high (target, operands[1]));
emit_insn (gen_macho_low (operands[0], target, operands[1]));
if (mode == DImode)
{
emit_insn (gen_macho_high_di (target, operands[1]));
emit_insn (gen_macho_low_di (operands[0], target, operands[1]));
}
else
{
emit_insn (gen_macho_high (target, operands[1]));
emit_insn (gen_macho_low (operands[0], target, operands[1]));
}
return;
}
......
gcc/config/rs6000/rs6000.md
......@@ -101,6 +101,7 @@
(include "8540.md")
(include "power4.md")
(include "power5.md")
(include "darwin.md")
;; Start with fixed-point load and store insns. Here we put only the more
......@@ -10158,8 +10159,12 @@
CODE_LABEL_NUMBER (operands[0]));
tmplabrtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (tmplab));
emit_insn (gen_load_macho_picbase (picreg, tmplabrtx));
emit_insn (gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
emit_insn (TARGET_64BIT
? gen_load_macho_picbase_di (picreg, tmplabrtx)
: gen_load_macho_picbase (picreg, tmplabrtx));
emit_insn (TARGET_64BIT
? gen_macho_correct_pic_di (picreg, picreg, picrtx, tmplabrtx)
: gen_macho_correct_pic (picreg, picreg, picrtx, tmplabrtx));
}
else
#endif
......
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