Commit ac5eda13 by Paolo Bonzini Committed by Paolo Bonzini

tm.texi (STORE_FLAG_VALUE): Do not refer to sCC patterns.

2010-05-25  Paolo Bonzini  <bonzini@gnu.org>

	* doc/tm.texi (STORE_FLAG_VALUE): Do not refer to sCC patterns.
	* doc/md.texi (cstoreXX4): Update for cond-optab changes.

From-SVN: r159814
parent 6597fd0b
2010-05-09 Paolo Bonzini <bonzini@gnu.org> 2010-05-25 Paolo Bonzini <bonzini@gnu.org>
* doc/tm.texi (STORE_FLAG_VALUE): Do not refer to sCC patterns.
* doc/md.texi (cstoreXX4): Update for cond-optab changes.
2010-05-25 Paolo Bonzini <bonzini@gnu.org>
PR target/43610 PR target/43610
* optabs.c (prepare_float_lib_cmp): Allow reversing the comparison * optabs.c (prepare_float_lib_cmp): Allow reversing the comparison
......
...@@ -4705,20 +4705,28 @@ else must be negative. Otherwise the instruction is not suitable and ...@@ -4705,20 +4705,28 @@ else must be negative. Otherwise the instruction is not suitable and
you should omit it from the machine description. You describe to the you should omit it from the machine description. You describe to the
compiler exactly which value is stored by defining the macro compiler exactly which value is stored by defining the macro
@code{STORE_FLAG_VALUE} (@pxref{Misc}). If a description cannot be @code{STORE_FLAG_VALUE} (@pxref{Misc}). If a description cannot be
found that can be used for all the @samp{s@var{cond}} patterns, you found that can be used for all the possible comparison operators, you
should omit those operations from the machine description. should pick one and use a @code{define_expand} to map all results
onto the one you chose.
These operations may fail, but should do so only in relatively
uncommon cases; if they would fail for common cases involving These operations may @code{FAIL}, but should do so only in relatively
integer comparisons, it is best to omit these patterns. uncommon cases; if they would @code{FAIL} for common cases involving
integer comparisons, it is best to restrict the predicates to not
If these operations are omitted, the compiler will usually generate code allow these operands. Likewise if a given comparison operator will
that copies the constant one to the target and branches around an always fail, independent of the operands (for floating-point modes, the
assignment of zero to the target. If this code is more efficient than @code{ordered_comparison_operator} predicate is often useful in this case).
the potential instructions used for the @samp{cstore@var{mode}4} pattern
followed by those required to convert the result into a 1 or a zero in If this pattern is omitted, the compiler will generate a conditional
@code{SImode}, you should omit the @samp{cstore@var{mode}4} operations from branch---for example, it may copy a constant one to the target and branching
the machine description. around an assignment of zero to the target---or a libcall. If the predicate
for operand 1 only rejects some operators, it will also try reordering the
operands and/or inverting the result value (e.g.@: by an exclusive OR).
These possibilities could be cheaper or equivalent to the instructions
used for the @samp{cstore@var{mode}4} pattern followed by those required
to convert a positive result from @code{STORE_FLAG_VALUE} to 1; in this
case, you can and should make operand 1's predicate reject some operators
in the @samp{cstore@var{mode}4} pattern, or remove the pattern altogether
from the machine description.
@cindex @code{cbranch@var{mode}4} instruction pattern @cindex @code{cbranch@var{mode}4} instruction pattern
@item @samp{cbranch@var{mode}4} @item @samp{cbranch@var{mode}4}
......
...@@ -10264,8 +10264,8 @@ In order to enforce the representation of @code{mode}, ...@@ -10264,8 +10264,8 @@ In order to enforce the representation of @code{mode},
@defmac STORE_FLAG_VALUE @defmac STORE_FLAG_VALUE
A C expression describing the value returned by a comparison operator A C expression describing the value returned by a comparison operator
with an integral mode and stored by a store-flag instruction with an integral mode and stored by a store-flag instruction
(@samp{s@var{cond}}) when the condition is true. This description must (@samp{cstore@var{mode}4}) when the condition is true. This description must
apply to @emph{all} the @samp{s@var{cond}} patterns and all the apply to @emph{all} the @samp{cstore@var{mode}4} patterns and all the
comparison operators whose results have a @code{MODE_INT} mode. comparison operators whose results have a @code{MODE_INT} mode.
A value of 1 or @minus{}1 means that the instruction implementing the A value of 1 or @minus{}1 means that the instruction implementing the
...@@ -10274,7 +10274,7 @@ and 0 when the comparison is false. Otherwise, the value indicates ...@@ -10274,7 +10274,7 @@ and 0 when the comparison is false. Otherwise, the value indicates
which bits of the result are guaranteed to be 1 when the comparison is which bits of the result are guaranteed to be 1 when the comparison is
true. This value is interpreted in the mode of the comparison true. This value is interpreted in the mode of the comparison
operation, which is given by the mode of the first operand in the operation, which is given by the mode of the first operand in the
@samp{s@var{cond}} pattern. Either the low bit or the sign bit of @samp{cstore@var{mode}4} pattern. Either the low bit or the sign bit of
@code{STORE_FLAG_VALUE} be on. Presently, only those bits are used by @code{STORE_FLAG_VALUE} be on. Presently, only those bits are used by
the compiler. the compiler.
...@@ -10347,7 +10347,7 @@ those cases, e.g., one matching ...@@ -10347,7 +10347,7 @@ those cases, e.g., one matching
Some machines can also perform @code{and} or @code{plus} operations on Some machines can also perform @code{and} or @code{plus} operations on
condition code values with less instructions than the corresponding condition code values with less instructions than the corresponding
@samp{s@var{cond}} insn followed by @code{and} or @code{plus}. On those @samp{cstore@var{mode}4} insn followed by @code{and} or @code{plus}. On those
machines, define the appropriate patterns. Use the names @code{incscc} machines, define the appropriate patterns. Use the names @code{incscc}
and @code{decscc}, respectively, for the patterns which perform and @code{decscc}, respectively, for the patterns which perform
@code{plus} or @code{minus} operations on condition code values. See @code{plus} or @code{minus} operations on condition code values. See
......
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