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Commit ac42d1e9 by Kaveh R. Ghazi Committed by Kaveh Ghazi
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mn10200-protos.h: New file. 

        * mn10200-protos.h: New file.

        * mn10200.c: Include tm_p.h.  Add static prototypes.  Fix compile
        time warnings.

        * mn10200.h: Move prototypes to mn10200-protos.h.  Fix compile time
        warnings.

        * mn10200.md: Likewise.

From-SVN: r31427
parent 441d04c6
Showing with 96 additions and 39 deletions
gcc/ChangeLog
2000-01-14 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* mn10200-protos.h: New file.
* mn10200.c: Include tm_p.h. Add static prototypes. Fix compile
time warnings.
* mn10200.h: Move prototypes to mn10200-protos.h. Fix compile time
warnings.
* mn10200.md: Likewise.
2000-01-14 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* h8300-protos.h: New file.
* h8300.c: Include tm_p.h. Add static prototypes. Fix compile
......
gcc/config/mn10200/mn10200-protos.h 0 → 100644
/* Definitions of target machine for GNU compiler. Matsushita MN10200 series
Copyright (C) 2000 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#ifdef RTX_CODE
extern void print_operand PARAMS ((FILE *, rtx, int));
extern void print_operand_address PARAMS ((FILE *, rtx));
extern void notice_update_cc PARAMS ((rtx, rtx));
extern enum reg_class secondary_reload_class PARAMS ((enum reg_class,
enum machine_mode,
rtx, int));
extern const char *emit_a_shift PARAMS ((rtx, rtx *));
extern const char *output_tst PARAMS ((rtx, rtx));
extern int expand_a_shift PARAMS ((enum machine_mode, int, rtx[]));
extern int call_address_operand PARAMS ((rtx, enum machine_mode));
extern int extendpsi_operand PARAMS ((rtx, enum machine_mode));
extern int psimode_truncation_operand PARAMS ((rtx, enum machine_mode));
extern int constant_memory_operand PARAMS ((rtx, enum machine_mode));
extern int nshift_operator PARAMS ((rtx, enum machine_mode));
#endif /* RTX_CODE */
#ifdef TREE_CODE
extern struct rtx_def *function_arg PARAMS ((CUMULATIVE_ARGS *,
enum machine_mode, tree, int));
extern struct rtx_def *mn10200_va_arg PARAMS ((tree, tree));
extern int function_arg_partial_nregs PARAMS ((CUMULATIVE_ARGS *,
enum machine_mode, tree, int));
#endif /* TREE_CODE */
extern void asm_file_start PARAMS ((FILE *));
extern void expand_prologue PARAMS ((void));
extern void expand_epilogue PARAMS ((void));
extern int total_frame_size PARAMS ((void));
gcc/config/mn10200/mn10200.c
/* Subroutines for insn-output.c for Matsushita MN10200 series
Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
......@@ -37,6 +37,8 @@ Boston, MA 02111-1307, USA. */
#include "function.h"
#include "obstack.h"
#include "ggc.h"
#include "toplev.h"
#include "tm_p.h"
/* Global registers known to hold the value zero.
......@@ -58,6 +60,8 @@ Boston, MA 02111-1307, USA. */
rtx zero_dreg;
rtx zero_areg;
static void count_tst_insns PARAMS ((int *));
/* Note whether or not we need an out of line epilogue. */
static int out_of_line_epilogue;
......@@ -486,7 +490,7 @@ total_frame_size ()
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
if (regs_ever_live[i] && !call_used_regs[i] && ! fixed_regs[i]
if ((regs_ever_live[i] && !call_used_regs[i] && ! fixed_regs[i])
|| (i == FRAME_POINTER_REGNUM && frame_pointer_needed))
size += 4;
}
......@@ -665,7 +669,7 @@ expand_prologue ()
for (i = 0, offset = outgoing_args_size;
i < FIRST_PSEUDO_REGISTER; i++)
{
if (regs_ever_live[i] && !call_used_regs[i] && ! fixed_regs[i]
if ((regs_ever_live[i] && !call_used_regs[i] && ! fixed_regs[i])
|| (i == FRAME_POINTER_REGNUM && frame_pointer_needed))
{
int regno;
......@@ -757,7 +761,7 @@ expand_epilogue ()
/* Restore each register. */
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
if (regs_ever_live[i] && !call_used_regs[i] && ! fixed_regs[i]
if ((regs_ever_live[i] && !call_used_regs[i] && ! fixed_regs[i])
|| (i == FRAME_POINTER_REGNUM && frame_pointer_needed))
{
int regno;
......@@ -860,7 +864,7 @@ notice_update_cc (body, insn)
int
call_address_operand (op, mode)
rtx op;
enum machine_mode mode;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
}
......@@ -870,7 +874,7 @@ call_address_operand (op, mode)
int
constant_memory_operand (op, mode)
rtx op;
enum machine_mode mode;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
return GET_CODE (op) == MEM && CONSTANT_ADDRESS_P (XEXP (op, 0));
}
......@@ -899,8 +903,6 @@ secondary_reload_class (class, mode, in, input)
rtx in;
int input;
{
int regno;
/* Memory loads less than a full word wide can't have an
address or stack pointer destination. They must use
a data register as an intermediate register. */
......@@ -957,7 +959,7 @@ secondary_reload_class (class, mode, in, input)
int
nshift_operator (x, mode)
rtx x;
enum machine_mode mode;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
switch (GET_CODE (x))
{
......@@ -1034,7 +1036,7 @@ enum shift_mode
struct shift_insn
{
char *assembler;
const char *assembler;
int cc_valid;
};
......@@ -1060,6 +1062,10 @@ static const struct shift_insn shift_one[3][3] =
},
};
static enum shift_alg get_shift_alg PARAMS ((enum shift_type,
enum machine_mode, int,
const char **, int *));
/* Given CPU, MODE, SHIFT_TYPE, and shift count COUNT, determine the best
algorithm for doing the shift. The assembler code is stored in ASSEMBLER.
We don't achieve maximum efficiency in all cases, but the hooks are here
......@@ -1227,15 +1233,14 @@ get_shift_alg (shift_type, mode, count, assembler_p, cc_valid_p)
/* Emit the assembler code for doing shifts. */
char *
const char *
emit_a_shift (insn, operands)
rtx insn;
rtx insn ATTRIBUTE_UNUSED;
rtx *operands;
{
static int loopend_lab;
char *assembler;
const char *assembler;
int cc_valid;
rtx inside = PATTERN (insn);
rtx shift = operands[3];
enum machine_mode mode = GET_MODE (shift);
enum rtx_code code = GET_CODE (shift);
......@@ -1487,7 +1492,7 @@ mn10200_va_arg (valist, type)
return force_reg (Pmode, expand_expr (t, NULL_RTX, Pmode, EXPAND_NORMAL));
}
char *
const char *
output_tst (operand, insn)
rtx operand, insn;
{
......@@ -1572,6 +1577,7 @@ output_tst (operand, insn)
It accepts anything that is a general operand or the sum of the
stack pointer and a general operand. */
int
extendpsi_operand (op, mode)
rtx op;
enum machine_mode mode;
......
gcc/config/mn10200/mn10200.h
/* Definitions of target machine for GNU compiler. Matsushita MN10200 series
Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
......@@ -53,7 +53,7 @@ extern int target_flags;
An empty string NAME is used to identify the default VALUE. */
#define TARGET_SWITCHES \
{{ "", TARGET_DEFAULT}}
{{ "", TARGET_DEFAULT, 0}}
#ifndef TARGET_DEFAULT
#define TARGET_DEFAULT 0
......@@ -249,11 +249,11 @@ enum reg_class {
of length N_REG_CLASSES. */
#define REG_CLASS_CONTENTS \
{ 0, /* No regs */ \
0x0f, /* DATA_REGS */ \
0xf0, /* ADDRESS_REGS */ \
0xff, /* GENERAL_REGS */ \
0xff, /* ALL_REGS */ \
{ {0}, /* No regs */ \
{0x0f}, /* DATA_REGS */ \
{0xf0}, /* ADDRESS_REGS */ \
{0xff}, /* GENERAL_REGS */ \
{0xff}, /* ALL_REGS */ \
}
/* The same information, inverted:
......@@ -504,12 +504,10 @@ struct cum_arg { int nbytes; };
NAMED is nonzero if this argument is a named parameter
(otherwise it is an extra parameter matching an ellipsis). */
extern struct rtx_def *function_arg();
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
function_arg (&CUM, MODE, TYPE, NAMED)
/* Implement `va_arg'. */
extern struct rtx_def *mn10200_va_arg();
#define EXPAND_BUILTIN_VA_ARG(valist, type) \
mn10200_va_arg (valist, type)
......@@ -1069,17 +1067,5 @@ do { char dstr[30]; \
SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM }}, \
{"nshift_operator", { ASHIFTRT, LSHIFTRT, ASHIFT }},
extern void asm_file_start ();
extern void print_operand ();
extern void print_operand_address ();
extern void expand_prologue ();
extern void expand_epilogue ();
extern void notice_update_cc ();
extern int call_address_operand ();
extern enum reg_class secondary_reload_class ();
extern char *emit_a_shift ();
extern char *output_tst ();
extern int extendpsi_operand ();
extern int psimode_truncation_operand ();
extern struct rtx_def *zero_dreg;
extern struct rtx_def *zero_areg;
gcc/config/mn10200/mn10200.md
;; GCC machine description for Matsushita MN10200
;; Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
;; Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
;; This file is part of GNU CC.
......@@ -228,6 +228,8 @@
else
output_asm_insn (\"mov %o1,%L0\", operands);
return \"\";
default:
abort();
}
}"
[(set_attr "cc" "none,clobber,clobber,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")])
......@@ -920,7 +922,7 @@
""
"
{
if (! call_address_operand (XEXP (operands[0], 0)))
if (! call_address_operand (XEXP (operands[0], 0), VOIDmode))
XEXP (operands[0], 0) = force_reg (PSImode, XEXP (operands[0], 0));
emit_call_insn (gen_call_internal (XEXP (operands[0], 0), operands[1]));
DONE;
......@@ -943,7 +945,7 @@
""
"
{
if (! call_address_operand (XEXP (operands[1], 0)))
if (! call_address_operand (XEXP (operands[1], 0), VOIDmode))
XEXP (operands[1], 0) = force_reg (PSImode, XEXP (operands[1], 0));
emit_call_insn (gen_call_value_internal (operands[0],
XEXP (operands[1], 0),
......
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