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riscv-gcc-1
Commit aba5fb01 by Nathan Sidwell Committed by Nathan Sidwell
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altivec.md (VIshort): New mode macro. 

	* config/rs6000/altivec.md (VIshort): New mode macro.
	(altivec_vaddubs, altivec_vadduhs, altivec_vadduws): Replace
	with ...
	(altivec_vaddu<VI_char>s): ... this.
	(altivec_vaddsbs, altivec_vaddshs, altivec_vaddsws): Replace
	with ...
	(altivec_vadds<VI_char>s): ... this.
	(altivec_vsububs, altivec_vsubuhs, altivec_vsubuws): Replace
	with ...
	(altivec_vsubu<VI_char>s): ... this.
	(altivec_vsubsbs, altivec_vsubshs, altivec_vsubsws): Replace
	with ...
	(altivec_vsubs<VI_char>s): ... this.
	(altivec_vavgub, altivec_vavguh, altivec_vavguw): Replace
	with ...
	(altivec_vavgu<VI_char>): ... this.
	(altivec_vavgsb, altivec_vavgsh, altivec_vavgsw): Replace
	with ...
	(altivec_vavgs<VI_char>): ... this.
	(altivec_vmsumubm, altivec_vmsumuhm): Replace with ...
	(altivec_vmsumu<VI_char>m): ... this.
	(altivec_vmsummbm, altivec_vmsummhm): Replace
	with ...
	(altivec_vmsumm<VI_char>m): ... this.
	(altivec_vandc): Remove.
	(*andc<mode>3): Renamed to ...
	(andc<mode>3): ... here. Swap operand 1 and 2 numbering.
	(altivec_vrlb, altivec_vrlh, altivec_vrlw): Replace
	with ...
	(altivec_vrl<VI_char>): ... this.
	(altivec_vslb, altivec_vslh, altivec_vslw): Replace
	with ...
	(altivec_vsl<VI_char>): ... this.
	(altivec_vsrb, altivec_vsrh, altivec_vsrw): Replace
	with ...
	(altivec_vsr<VI_char>): ... this.
	(altivec_vsrab, altivec_vsrah, altivec_vsraw): Replace
	with ...
	(altivec_vsra<VI_char>): ... this.
	(altivec_vsum4sbs, altivec_vsum4shs): Replace with ...
	(altivec_vsum4s<VI_char>s): ... this.
	(altivec_vperm_4si, altivec_vperm_8hi, altivec_vperm_16qi): Replace
	with ...
	(altivec_vperm_<mode>): ... this.
	(altivec_vsel_4sf): Rename to ...
	(altivec_vsel_v4sf): ... here.
	(altivec_vsel_4si, altivec_vsel_8hi, altivec_vsel_16qi): Replace
	with ...
	(altivec_vsel_<mode>): ... this.
	(altivec_vsldoi_4si, altivec_vsldoi_8hi,
	altivec_vsldoi_16qi): Rename to ...
	(altivec_vsldoi_v4si, altivec_vsldoi_v8hi,
	altivec_vsldoi_v16qi): ... here.
	(altivec_vsldoi_4sf): Rename to ...
	(altivec_vsldoi_v4sf): ... here.
	(altivec_predicate_v4si, altivec_predicate_v8hi,
	altivec_predicate_v16qi): Replace with ...
	(altivec_predicate_<mode>): ... this.
	(altivec_lvebx, altivec_lvehx, altivec_lvewx): Replace
	with ...
	(altivec_lve<VI_char>x): ... this.
	(altivec_stvebx, altivec_stvehx, altivec_stvewx): Replace
	with ...
	(altivec_stve<VI_char>x): ... this.
	(absv16qi2, absv8hi2, absv4si2): Replace
	with ...
	(abs<mode>2): ... this.
	(altivec_abss_v16qi, altivec_abss_v8hi, altivec_abss_v4si): Replace
	with ...
	(altivec_abss_<mode>): ... this.
	(vec_realign_load_v16qi, vec_realign_load_v8hi,
	vec_realign_load_v4si): Replace with ...
	(vec_realign_load_<mode>): ... this.
	* config/rs6000/rs6000.c (bdesc_3arg, bdesc_2arg): Update tweaked
	insn names.
	(rs6000_expand_ternop_builtin): Likewise.

From-SVN: r91287
parent 8f9bd776
Showing with 97 additions and 17 deletions
gcc/ChangeLog
2004-11-25 Nathan Sidwell <nathan@codesourcery.com>
* config/rs6000/altivec.md (VIshort): New mode macro.
(altivec_vaddubs, altivec_vadduhs, altivec_vadduws): Replace
with ...
(altivec_vaddu<VI_char>s): ... this.
(altivec_vaddsbs, altivec_vaddshs, altivec_vaddsws): Replace
with ...
(altivec_vadds<VI_char>s): ... this.
(altivec_vsububs, altivec_vsubuhs, altivec_vsubuws): Replace
with ...
(altivec_vsubu<VI_char>s): ... this.
(altivec_vsubsbs, altivec_vsubshs, altivec_vsubsws): Replace
with ...
(altivec_vsubs<VI_char>s): ... this.
(altivec_vavgub, altivec_vavguh, altivec_vavguw): Replace
with ...
(altivec_vavgu<VI_char>): ... this.
(altivec_vavgsb, altivec_vavgsh, altivec_vavgsw): Replace
with ...
(altivec_vavgs<VI_char>): ... this.
(altivec_vmsumubm, altivec_vmsumuhm): Replace with ...
(altivec_vmsumu<VI_char>m): ... this.
(altivec_vmsummbm, altivec_vmsummhm): Replace
with ...
(altivec_vmsumm<VI_char>m): ... this.
(altivec_vandc): Remove.
(*andc<mode>3): Renamed to ...
(andc<mode>3): ... here. Swap operand 1 and 2 numbering.
(altivec_vrlb, altivec_vrlh, altivec_vrlw): Replace
with ...
(altivec_vrl<VI_char>): ... this.
(altivec_vslb, altivec_vslh, altivec_vslw): Replace
with ...
(altivec_vsl<VI_char>): ... this.
(altivec_vsrb, altivec_vsrh, altivec_vsrw): Replace
with ...
(altivec_vsr<VI_char>): ... this.
(altivec_vsrab, altivec_vsrah, altivec_vsraw): Replace
with ...
(altivec_vsra<VI_char>): ... this.
(altivec_vsum4sbs, altivec_vsum4shs): Replace with ...
(altivec_vsum4s<VI_char>s): ... this.
(altivec_vperm_4si, altivec_vperm_8hi, altivec_vperm_16qi): Replace
with ...
(altivec_vperm_<mode>): ... this.
(altivec_vsel_4sf): Rename to ...
(altivec_vsel_v4sf): ... here.
(altivec_vsel_4si, altivec_vsel_8hi, altivec_vsel_16qi): Replace
with ...
(altivec_vsel_<mode>): ... this.
(altivec_vsldoi_4si, altivec_vsldoi_8hi,
altivec_vsldoi_16qi): Rename to ...
(altivec_vsldoi_v4si, altivec_vsldoi_v8hi,
altivec_vsldoi_v16qi): ... here.
(altivec_vsldoi_4sf): Rename to ...
(altivec_vsldoi_v4sf): ... here.
(altivec_predicate_v4si, altivec_predicate_v8hi,
altivec_predicate_v16qi): Replace with ...
(altivec_predicate_<mode>): ... this.
(altivec_lvebx, altivec_lvehx, altivec_lvewx): Replace
with ...
(altivec_lve<VI_char>x): ... this.
(altivec_stvebx, altivec_stvehx, altivec_stvewx): Replace
with ...
(altivec_stve<VI_char>x): ... this.
(absv16qi2, absv8hi2, absv4si2): Replace
with ...
(abs<mode>2): ... this.
(altivec_abss_v16qi, altivec_abss_v8hi, altivec_abss_v4si): Replace
with ...
(altivec_abss_<mode>): ... this.
(vec_realign_load_v16qi, vec_realign_load_v8hi,
vec_realign_load_v4si): Replace with ...
(vec_realign_load_<mode>): ... this.
* config/rs6000/rs6000.c (bdesc_3arg, bdesc_2arg): Update tweaked
insn names.
(rs6000_expand_ternop_builtin): Likewise.
2004-11-25 Andrew Haley <aph@redhat.com> 2004-11-25 Andrew Haley <aph@redhat.com>
* gcc.c (process_command): Don't supply -v to linker. * gcc.c (process_command): Don't supply -v to linker.
...@@ -796,6 +875,7 @@ ...@@ -796,6 +875,7 @@
2004-11-22 Nathan Sidwell <nathan@codesourcery.com> 2004-11-22 Nathan Sidwell <nathan@codesourcery.com>
PR target/18531
* config/rs6000/altivec.md (VI_char): New mode attribute. * config/rs6000/altivec.md (VI_char): New mode attribute.
(addv16qi3, addv8hi3, addv4ai3): Replace with ... (addv16qi3, addv8hi3, addv4ai3): Replace with ...
(add<mode>3): ... this. (add<mode>3): ... this.
......
gcc/config/rs6000/rs6000.c
...@@ -6150,18 +6150,18 @@ static const struct builtin_description bdesc_3arg[] = ...@@ -6150,18 +6150,18 @@ static const struct builtin_description bdesc_3arg[] =
{ MASK_ALTIVEC, CODE_FOR_altivec_vmsumuhs, "__builtin_altivec_vmsumuhs", ALTIVEC_BUILTIN_VMSUMUHS }, { MASK_ALTIVEC, CODE_FOR_altivec_vmsumuhs, "__builtin_altivec_vmsumuhs", ALTIVEC_BUILTIN_VMSUMUHS },
{ MASK_ALTIVEC, CODE_FOR_altivec_vmsumshs, "__builtin_altivec_vmsumshs", ALTIVEC_BUILTIN_VMSUMSHS }, { MASK_ALTIVEC, CODE_FOR_altivec_vmsumshs, "__builtin_altivec_vmsumshs", ALTIVEC_BUILTIN_VMSUMSHS },
{ MASK_ALTIVEC, CODE_FOR_altivec_vnmsubfp, "__builtin_altivec_vnmsubfp", ALTIVEC_BUILTIN_VNMSUBFP }, { MASK_ALTIVEC, CODE_FOR_altivec_vnmsubfp, "__builtin_altivec_vnmsubfp", ALTIVEC_BUILTIN_VNMSUBFP },
{ MASK_ALTIVEC, CODE_FOR_altivec_vperm_4sf, "__builtin_altivec_vperm_4sf", ALTIVEC_BUILTIN_VPERM_4SF }, { MASK_ALTIVEC, CODE_FOR_altivec_vperm_v4sf, "__builtin_altivec_vperm_4sf", ALTIVEC_BUILTIN_VPERM_4SF },
{ MASK_ALTIVEC, CODE_FOR_altivec_vperm_4si, "__builtin_altivec_vperm_4si", ALTIVEC_BUILTIN_VPERM_4SI }, { MASK_ALTIVEC, CODE_FOR_altivec_vperm_v4si, "__builtin_altivec_vperm_4si", ALTIVEC_BUILTIN_VPERM_4SI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vperm_8hi, "__builtin_altivec_vperm_8hi", ALTIVEC_BUILTIN_VPERM_8HI }, { MASK_ALTIVEC, CODE_FOR_altivec_vperm_v8hi, "__builtin_altivec_vperm_8hi", ALTIVEC_BUILTIN_VPERM_8HI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vperm_16qi, "__builtin_altivec_vperm_16qi", ALTIVEC_BUILTIN_VPERM_16QI }, { MASK_ALTIVEC, CODE_FOR_altivec_vperm_v16qi, "__builtin_altivec_vperm_16qi", ALTIVEC_BUILTIN_VPERM_16QI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsel_4sf, "__builtin_altivec_vsel_4sf", ALTIVEC_BUILTIN_VSEL_4SF }, { MASK_ALTIVEC, CODE_FOR_altivec_vsel_v4sf, "__builtin_altivec_vsel_4sf", ALTIVEC_BUILTIN_VSEL_4SF },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsel_4si, "__builtin_altivec_vsel_4si", ALTIVEC_BUILTIN_VSEL_4SI }, { MASK_ALTIVEC, CODE_FOR_altivec_vsel_v4si, "__builtin_altivec_vsel_4si", ALTIVEC_BUILTIN_VSEL_4SI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsel_8hi, "__builtin_altivec_vsel_8hi", ALTIVEC_BUILTIN_VSEL_8HI }, { MASK_ALTIVEC, CODE_FOR_altivec_vsel_v8hi, "__builtin_altivec_vsel_8hi", ALTIVEC_BUILTIN_VSEL_8HI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsel_16qi, "__builtin_altivec_vsel_16qi", ALTIVEC_BUILTIN_VSEL_16QI }, { MASK_ALTIVEC, CODE_FOR_altivec_vsel_v16qi, "__builtin_altivec_vsel_16qi", ALTIVEC_BUILTIN_VSEL_16QI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_16qi, "__builtin_altivec_vsldoi_16qi", ALTIVEC_BUILTIN_VSLDOI_16QI }, { MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_v16qi, "__builtin_altivec_vsldoi_16qi", ALTIVEC_BUILTIN_VSLDOI_16QI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_8hi, "__builtin_altivec_vsldoi_8hi", ALTIVEC_BUILTIN_VSLDOI_8HI }, { MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_v8hi, "__builtin_altivec_vsldoi_8hi", ALTIVEC_BUILTIN_VSLDOI_8HI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_4si, "__builtin_altivec_vsldoi_4si", ALTIVEC_BUILTIN_VSLDOI_4SI }, { MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_v4si, "__builtin_altivec_vsldoi_4si", ALTIVEC_BUILTIN_VSLDOI_4SI },
{ MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_4sf, "__builtin_altivec_vsldoi_4sf", ALTIVEC_BUILTIN_VSLDOI_4SF }, { MASK_ALTIVEC, CODE_FOR_altivec_vsldoi_v4sf, "__builtin_altivec_vsldoi_4sf", ALTIVEC_BUILTIN_VSLDOI_4SF },
}; };
/* DST operations: void foo (void *, const int, const char). */ /* DST operations: void foo (void *, const int, const char). */
...@@ -6190,7 +6190,7 @@ static struct builtin_description bdesc_2arg[] = ...@@ -6190,7 +6190,7 @@ static struct builtin_description bdesc_2arg[] =
{ MASK_ALTIVEC, CODE_FOR_altivec_vadduws, "__builtin_altivec_vadduws", ALTIVEC_BUILTIN_VADDUWS }, { MASK_ALTIVEC, CODE_FOR_altivec_vadduws, "__builtin_altivec_vadduws", ALTIVEC_BUILTIN_VADDUWS },
{ MASK_ALTIVEC, CODE_FOR_altivec_vaddsws, "__builtin_altivec_vaddsws", ALTIVEC_BUILTIN_VADDSWS }, { MASK_ALTIVEC, CODE_FOR_altivec_vaddsws, "__builtin_altivec_vaddsws", ALTIVEC_BUILTIN_VADDSWS },
{ MASK_ALTIVEC, CODE_FOR_andv4si3, "__builtin_altivec_vand", ALTIVEC_BUILTIN_VAND }, { MASK_ALTIVEC, CODE_FOR_andv4si3, "__builtin_altivec_vand", ALTIVEC_BUILTIN_VAND },
{ MASK_ALTIVEC, CODE_FOR_altivec_vandc, "__builtin_altivec_vandc", ALTIVEC_BUILTIN_VANDC }, { MASK_ALTIVEC, CODE_FOR_andcv4si3, "__builtin_altivec_vandc", ALTIVEC_BUILTIN_VANDC },
{ MASK_ALTIVEC, CODE_FOR_altivec_vavgub, "__builtin_altivec_vavgub", ALTIVEC_BUILTIN_VAVGUB }, { MASK_ALTIVEC, CODE_FOR_altivec_vavgub, "__builtin_altivec_vavgub", ALTIVEC_BUILTIN_VAVGUB },
{ MASK_ALTIVEC, CODE_FOR_altivec_vavgsb, "__builtin_altivec_vavgsb", ALTIVEC_BUILTIN_VAVGSB }, { MASK_ALTIVEC, CODE_FOR_altivec_vavgsb, "__builtin_altivec_vavgsb", ALTIVEC_BUILTIN_VAVGSB },
{ MASK_ALTIVEC, CODE_FOR_altivec_vavguh, "__builtin_altivec_vavguh", ALTIVEC_BUILTIN_VAVGUH }, { MASK_ALTIVEC, CODE_FOR_altivec_vavguh, "__builtin_altivec_vavguh", ALTIVEC_BUILTIN_VAVGUH },
...@@ -6949,10 +6949,10 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree arglist, rtx target) ...@@ -6949,10 +6949,10 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree arglist, rtx target)
|| arg2 == error_mark_node) || arg2 == error_mark_node)
return const0_rtx; return const0_rtx;
if (icode == CODE_FOR_altivec_vsldoi_4sf if (icode == CODE_FOR_altivec_vsldoi_v4sf
|| icode == CODE_FOR_altivec_vsldoi_4si || icode == CODE_FOR_altivec_vsldoi_v4si
|| icode == CODE_FOR_altivec_vsldoi_8hi || icode == CODE_FOR_altivec_vsldoi_v8hi
|| icode == CODE_FOR_altivec_vsldoi_16qi) || icode == CODE_FOR_altivec_vsldoi_v16qi)
{ {
/* Only allow 4-bit unsigned literals. */ /* Only allow 4-bit unsigned literals. */
STRIP_NOPS (arg2); STRIP_NOPS (arg2);
......
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