re PR target/66922 (wrong code for bit-field struct at -O1 and above on x86_64-linux-gnu)

	PR target/66922
	* config/i386/i386.c (ix86_expand_pextr): Reject extractions
	from misaligned positions.
	(ix86_expand_pinsr): Reject insertions to misaligned positions.

testsuite/ChangeLog:

	PR target/66922
	* gcc.target/i386/pr66922.c: New test.

From-SVN: r225980

gcc/ChangeLog

+2015-07-18  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/66922
+	* config/i386/i386.c (ix86_expand_pextr): Reject extractions
+	from misaligned positions.
+	(ix86_expand_pinsr): Reject insertions to misaligned positions.
+
 2015-07-18  Sebastian Pop  <s.pop@samsung.com>
 
 	PR middle-end/46851

gcc/config/i386/i386.c

@@ -50591,6 +50591,10 @@ ix86_expand_pextr (rtx *operands)
 	    return false;
 	  }
 
+	/* Reject extractions from misaligned positions.  */
+	if (pos & (size-1))
+	  return false;
+
 	if (GET_MODE (dst) == dstmode)
 	  d = dst;
 	else
@@ -50687,6 +50691,10 @@ ix86_expand_pinsr (rtx *operands)
 	    return false;
 	  }
 
+	/* Reject insertions to misaligned positions.  */
+	if (pos & (size-1))
+	  return false;
+
 	if (GET_CODE (src) == SUBREG)
 	  {
 	    unsigned int srcpos = SUBREG_BYTE (src);

gcc/testsuite/ChangeLog

+2015-07-18  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/66922
+	* gcc.target/i386/pr66922.c: New test.
+
 2015-07-18  Sebastian Pop  <s.pop@samsung.com>
 
 	PR middle-end/46851

gcc/testsuite/gcc.target/i386/pr66922.c

+/* { dg-do run } */
+/* { dg-options "-O1 -msse2" } */
+/* { dg-require-effective-target sse2 } */
+
+#include "sse2-check.h"
+
+struct S 
+{
+  int:31;
+  int:2;
+  int f0:16;
+  int f1;
+  int f2;
+};
+
+static void 
+sse2_test (void)
+{
+  struct S a = { 1, 0, 0 };
+
+  if (a.f0 != 1)
+    __builtin_abort(); 
+}