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lvzhengyang
riscv-gcc-1
Commits
aaef1c12
Commit
aaef1c12
authored
Jan 11, 2002
by
Janis Johnson
Committed by
Janis Johnson
Jan 11, 2002
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* doc/rtl.texi (Insns): Fix 2 typos.
From-SVN: r48784
parent
5d22c1a5
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gcc/ChangeLog
View file @
aaef1c12
2002-01-11 Janis Johnson <janis187@us.ibm.com>
* doc/rtl.texi (Insns): Fix 2 typos.
2002-01-11 Joseph S. Myers <jsm28@cam.ac.uk>
* doc/invoke.texi: Avoid overfull hboxes. Add summary of D30V
...
...
gcc/doc/rtl.texi
View file @
aaef1c12
...
...
@@ -2681,7 +2681,7 @@ This means that the above invariants are not necessarily true for insns
inside
@code
{
sequence
}
expressions
.
Specifically
,
if
@var
{
insn
}
is
the
first
insn
in
a
@code
{
sequence
},
@code
{
NEXT_INSN
(
PREV_INSN
(
@var
{
insn
}))}
is
the
insn
containing
the
@code
{
sequence
}
expression
,
as
is
the
value
of
@code
{
PREV_INSN
(
NEXT_INSN
(
@var
{
insn
}))}
i
s
@var
{
insn
}
is
the
last
of
@code
{
PREV_INSN
(
NEXT_INSN
(
@var
{
insn
}))}
i
f
@var
{
insn
}
is
the
last
insn
in
the
@code
{
sequence
}
expression
.
You
can
use
these
expressions
to
find
the
containing
@code
{
sequence
}
expression
.
...
...
@@ -3098,7 +3098,7 @@ insufficient registers are available.
Except
for
stack
homes
for
parameters
,
which
are
indicated
by
a
@code{
REG_EQUIV
}
note
and
are
not
useful
to
the
early
optimization
passes
and
pseudo
registers
that
are
equivalent
to
a
memory
location
throughout
the
re
entire
life
,
which
is
not
detected
until
later
in
throughout
the
ir
entire
life
,
which
is
not
detected
until
later
in
the
compilation
,
all
equivalences
are
initially
indicated
by
an
attached
@code{
REG_EQUAL
}
note
.
In
the
early
stages
of
register
allocation
,
a
@code{
REG_EQUAL
}
note
is
changed
into
a
@code{
REG_EQUIV
}
note
if
...
...
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