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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
aa6b905d
Commit
aa6b905d
authored
Apr 25, 1992
by
Richard Stallman
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*** empty log message ***
From-SVN: r828
parent
1bfe98cb
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2 changed files
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16 additions
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16 deletions
+16
-16
gcc/config/i860/sysv3.h
+2
-2
gcc/config/sparc/sysv4.h
+14
-14
No files found.
gcc/config/i860/sysv3.h
View file @
aa6b905d
...
@@ -24,7 +24,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
...
@@ -24,7 +24,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Provide a set of pre-definitions and pre-assertions appropriate for
/* Provide a set of pre-definitions and pre-assertions appropriate for
the i860 running svr3. */
the i860 running svr3. */
#define CPP_PREDEFINES "-Di860 -Dunix -DSVR3"
#define CPP_PREDEFINES "-Di860 -Dunix -DSVR3
-D__SVR3__
"
/* Use crt1.o as a startup file and crtn.o as a closing file. */
/* Use crt1.o as a startup file and crtn.o as a closing file. */
...
@@ -103,7 +103,7 @@ extern char *current_function_original_name;
...
@@ -103,7 +103,7 @@ extern char *current_function_original_name;
fprintf ((FILE), "\"\n"); \
fprintf ((FILE), "\"\n"); \
bytes_in_chunk = 0; \
bytes_in_chunk = 0; \
} \
} \
fprintf ((FILE), "%s\t%d\n", ASM_BYTE_OP, ch); \
fprintf ((FILE), "
\t
%s\t%d\n", ASM_BYTE_OP, ch); \
} \
} \
else \
else \
{ \
{ \
...
...
gcc/config/sparc/sysv4.h
View file @
aa6b905d
...
@@ -67,13 +67,13 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
...
@@ -67,13 +67,13 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
to keep the Sparc/svr4 assembler somewhat compatible with the Sparc/SunOS
to keep the Sparc/svr4 assembler somewhat compatible with the Sparc/SunOS
assembler. */
assembler. */
#define STRING_ASM_OP "
\t
.asciz"
#define STRING_ASM_OP ".asciz"
#define COMMON_ASM_OP "
\t
.common"
#define COMMON_ASM_OP ".common"
#define SKIP_ASM_OP "
\t
.skip"
#define SKIP_ASM_OP ".skip"
#define UNALIGNED_INT_ASM_OP "
\t
.uaword"
#define UNALIGNED_INT_ASM_OP ".uaword"
#define UNALIGNED_SHORT_ASM_OP "
\t
.uahalf"
#define UNALIGNED_SHORT_ASM_OP ".uahalf"
#define PUSHSECTION_ASM_OP "
\t
.pushsection"
#define PUSHSECTION_ASM_OP ".pushsection"
#define POPSECTION_ASM_OP "
\t
.popsection"
#define POPSECTION_ASM_OP ".popsection"
/* This is the format used to print the second operand of a .type pseudo-op
/* This is the format used to print the second operand of a .type pseudo-op
for the Sparc/svr4 assembler. */
for the Sparc/svr4 assembler. */
...
@@ -174,10 +174,10 @@ do { \
...
@@ -174,10 +174,10 @@ do { \
*not* to push the previous section name onto the assembler's
*not* to push the previous section name onto the assembler's
section names stack (as we do often in dwarfout.c). */
section names stack (as we do often in dwarfout.c). */
#define TEXT_SECTION_ASM_OP "
\t
.section\t\".text\""
#define TEXT_SECTION_ASM_OP ".section\t\".text\""
#define DATA_SECTION_ASM_OP "
\t
.section\t\".data\""
#define DATA_SECTION_ASM_OP ".section\t\".data\""
#define BSS_SECTION_ASM_OP "
\t
.section\t\".bss\""
#define BSS_SECTION_ASM_OP ".section\t\".bss\""
#define CONST_SECTION_ASM_OP "
\t
.section\t\".rodata\""
#define CONST_SECTION_ASM_OP ".section\t\".rodata\""
#define INIT_SECTION_ASM_OP "
\t
.section\t\".init\",#alloc"
#define INIT_SECTION_ASM_OP ".section\t\".init\",#alloc"
#define CTORS_SECTION_ASM_OP "
\t
.section\t\".ctors\",#alloc"
#define CTORS_SECTION_ASM_OP ".section\t\".ctors\",#alloc"
#define DTORS_SECTION_ASM_OP "
\t
.section\t\".dtors\",#alloc"
#define DTORS_SECTION_ASM_OP ".section\t\".dtors\",#alloc"
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