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riscv-gcc-1
Commit aa53e58b by Joseph Myers Committed by Joseph Myers
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sparc-opts.h: New. 

	* config/sparc/sparc-opts.h: New.
	* config/sparc/sparc.c (sparc_handle_option, sparc_select,
	sparc_cpu, fpu_option_set, TARGET_HANDLE_OPTION): Remove.
	(sparc_option_override): Store processor_type enumeration rather
	than string in cpu_default.  Remove name and enumeration from
	cpu_table.  Directly default -mcpu then default -mtune from -mcpu
	without using sparc_select.  Use target_flags_explicit instead of
	fpu_option_set.
	* config/sparc/sparc.h (enum processor_type): Move to
	sparc-opts.h.
	(sparc_cpu, struct sparc_cpu_select, sparc_select): Remove.
	* config/sparc/sparc.opt (config/sparc/sparc-opts.h): New
	HeaderInclude entry.
	(mcpu=, mtune=): Use Var and Enum.
	(sparc_processor_type): New Enum and EnumValue entries.

From-SVN: r171601
parent 8c6d158a
Showing with 172 additions and 156 deletions
gcc/ChangeLog
2011-03-28 Joseph Myers <joseph@codesourcery.com>
* config/sparc/sparc-opts.h: New.
* config/sparc/sparc.c (sparc_handle_option, sparc_select,
sparc_cpu, fpu_option_set, TARGET_HANDLE_OPTION): Remove.
(sparc_option_override): Store processor_type enumeration rather
than string in cpu_default. Remove name and enumeration from
cpu_table. Directly default -mcpu then default -mtune from -mcpu
without using sparc_select. Use target_flags_explicit instead of
fpu_option_set.
* config/sparc/sparc.h (enum processor_type): Move to
sparc-opts.h.
(sparc_cpu, struct sparc_cpu_select, sparc_select): Remove.
* config/sparc/sparc.opt (config/sparc/sparc-opts.h): New
HeaderInclude entry.
(mcpu=, mtune=): Use Var and Enum.
(sparc_processor_type): New Enum and EnumValue entries.
2011-03-28 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Iain Sandoe <iains@gcc.gnu.org>
......
gcc/config/sparc/sparc-opts.h 0 → 100644
/* Definitions for option handling for SPARC.
Copyright (C) 1996, 1999, 2002, 2006, 2007, 2010, 2011
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef SPARC_OPTS_H
#define SPARC_OPTS_H
/* Processor type.
These must match the values for the cpu attribute in sparc.md and
the table in sparc_option_override. */
enum processor_type {
PROCESSOR_V7,
PROCESSOR_CYPRESS,
PROCESSOR_V8,
PROCESSOR_SUPERSPARC,
PROCESSOR_HYPERSPARC,
PROCESSOR_LEON,
PROCESSOR_SPARCLITE,
PROCESSOR_F930,
PROCESSOR_F934,
PROCESSOR_SPARCLITE86X,
PROCESSOR_SPARCLET,
PROCESSOR_TSC701,
PROCESSOR_V9,
PROCESSOR_ULTRASPARC,
PROCESSOR_ULTRASPARC3,
PROCESSOR_NIAGARA,
PROCESSOR_NIAGARA2
};
#endif
gcc/config/sparc/sparc.c
......@@ -367,8 +367,6 @@ static HOST_WIDE_INT frame_base_offset;
/* 1 if the next opcode is to be specially indented. */
int sparc_indent_opcode = 0;
static bool sparc_handle_option (struct gcc_options *, struct gcc_options *,
const struct cl_decoded_option *, location_t);
static void sparc_option_override (void);
static void sparc_init_modes (void);
static void scan_record_type (const_tree, int *, int *, int *);
......@@ -486,21 +484,6 @@ enum cmodel sparc_cmodel;
char sparc_hard_reg_printed[8];
struct sparc_cpu_select sparc_select[] =
{
/* switch name, tune arch */
{ (char *)0, "default", 1, 1 },
{ (char *)0, "-mcpu=", 1, 1 },
{ (char *)0, "-mtune=", 1, 0 },
{ 0, 0, 0, 0 }
};
/* CPU type. This is set from TARGET_CPU_DEFAULT and -m{cpu,tune}=xxx. */
enum processor_type sparc_cpu;
/* Whether an FPU option was specified. */
static bool fpu_option_set = false;
/* Implement TARGET_OPTION_OPTIMIZATION_TABLE. */
static const struct default_options sparc_option_optimization_table[] =
{
......@@ -640,8 +623,6 @@ static const struct default_options sparc_option_optimization_table[] =
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
#undef TARGET_HANDLE_OPTION
#define TARGET_HANDLE_OPTION sparc_handle_option
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE sparc_option_override
#undef TARGET_OPTION_OPTIMIZATION_TABLE
......@@ -677,39 +658,6 @@ static const struct default_options sparc_option_optimization_table[] =
struct gcc_target targetm = TARGET_INITIALIZER;
/* Implement TARGET_HANDLE_OPTION. */
static bool
sparc_handle_option (struct gcc_options *opts, struct gcc_options *opts_set,
const struct cl_decoded_option *decoded,
location_t loc ATTRIBUTE_UNUSED)
{
size_t code = decoded->opt_index;
const char *arg = decoded->arg;
gcc_assert (opts == &global_options);
gcc_assert (opts_set == &global_options_set);
switch (code)
{
case OPT_mfpu:
case OPT_mhard_float:
case OPT_msoft_float:
fpu_option_set = true;
break;
case OPT_mcpu_:
sparc_select[1].string = arg;
break;
case OPT_mtune_:
sparc_select[2].string = arg;
break;
}
return true;
}
/* Validate and override various options, and do some machine dependent
initialization. */
......@@ -731,68 +679,64 @@ sparc_option_override (void)
/* Map TARGET_CPU_DEFAULT to value for -m{cpu,tune}=. */
static struct cpu_default {
const int cpu;
const char *const name;
const enum processor_type processor;
} const cpu_default[] = {
/* There must be one entry here for each TARGET_CPU value. */
{ TARGET_CPU_sparc, "cypress" },
{ TARGET_CPU_v8, "v8" },
{ TARGET_CPU_supersparc, "supersparc" },
{ TARGET_CPU_hypersparc, "hypersparc" },
{ TARGET_CPU_leon, "leon" },
{ TARGET_CPU_sparclite, "f930" },
{ TARGET_CPU_sparclite86x, "sparclite86x" },
{ TARGET_CPU_sparclet, "tsc701" },
{ TARGET_CPU_v9, "v9" },
{ TARGET_CPU_ultrasparc, "ultrasparc" },
{ TARGET_CPU_ultrasparc3, "ultrasparc3" },
{ TARGET_CPU_niagara, "niagara" },
{ TARGET_CPU_niagara2, "niagara2" },
{ 0, 0 }
{ TARGET_CPU_sparc, PROCESSOR_CYPRESS },
{ TARGET_CPU_v8, PROCESSOR_V8 },
{ TARGET_CPU_supersparc, PROCESSOR_SUPERSPARC },
{ TARGET_CPU_hypersparc, PROCESSOR_HYPERSPARC },
{ TARGET_CPU_leon, PROCESSOR_LEON },
{ TARGET_CPU_sparclite, PROCESSOR_F930 },
{ TARGET_CPU_sparclite86x, PROCESSOR_SPARCLITE86X },
{ TARGET_CPU_sparclet, PROCESSOR_TSC701 },
{ TARGET_CPU_v9, PROCESSOR_V9 },
{ TARGET_CPU_ultrasparc, PROCESSOR_ULTRASPARC },
{ TARGET_CPU_ultrasparc3, PROCESSOR_ULTRASPARC3 },
{ TARGET_CPU_niagara, PROCESSOR_NIAGARA },
{ TARGET_CPU_niagara2, PROCESSOR_NIAGARA2 },
{ -1, 0 }
};
const struct cpu_default *def;
/* Table of values for -m{cpu,tune}=. */
/* Table of values for -m{cpu,tune}=. This must match the order of
the PROCESSOR_* enumeration. */
static struct cpu_table {
const char *const name;
const enum processor_type processor;
const int disable;
const int enable;
} const cpu_table[] = {
{ "v7", PROCESSOR_V7, MASK_ISA, 0 },
{ "cypress", PROCESSOR_CYPRESS, MASK_ISA, 0 },
{ "v8", PROCESSOR_V8, MASK_ISA, MASK_V8 },
{ MASK_ISA, 0 },
{ MASK_ISA, 0 },
{ MASK_ISA, MASK_V8 },
/* TI TMS390Z55 supersparc */
{ "supersparc", PROCESSOR_SUPERSPARC, MASK_ISA, MASK_V8 },
{ "hypersparc", PROCESSOR_HYPERSPARC, MASK_ISA, MASK_V8|MASK_FPU },
{ MASK_ISA, MASK_V8 },
{ MASK_ISA, MASK_V8|MASK_FPU },
/* LEON */
{ "leon", PROCESSOR_LEON, MASK_ISA, MASK_V8|MASK_FPU },
{ "sparclite", PROCESSOR_SPARCLITE, MASK_ISA, MASK_SPARCLITE },
{ MASK_ISA, MASK_V8|MASK_FPU },
{ MASK_ISA, MASK_SPARCLITE },
/* The Fujitsu MB86930 is the original sparclite chip, with no FPU. */
{ "f930", PROCESSOR_F930, MASK_ISA|MASK_FPU, MASK_SPARCLITE },
{ MASK_ISA|MASK_FPU, MASK_SPARCLITE },
/* The Fujitsu MB86934 is the recent sparclite chip, with an FPU. */
{ "f934", PROCESSOR_F934, MASK_ISA, MASK_SPARCLITE|MASK_FPU },
{ "sparclite86x", PROCESSOR_SPARCLITE86X, MASK_ISA|MASK_FPU,
MASK_SPARCLITE },
{ "sparclet", PROCESSOR_SPARCLET, MASK_ISA, MASK_SPARCLET },
{ MASK_ISA, MASK_SPARCLITE|MASK_FPU },
{ MASK_ISA|MASK_FPU, MASK_SPARCLITE },
{ MASK_ISA, MASK_SPARCLET },
/* TEMIC sparclet */
{ "tsc701", PROCESSOR_TSC701, MASK_ISA, MASK_SPARCLET },
{ "v9", PROCESSOR_V9, MASK_ISA, MASK_V9 },
{ MASK_ISA, MASK_SPARCLET },
{ MASK_ISA, MASK_V9 },
/* UltraSPARC I, II, IIi */
{ "ultrasparc", PROCESSOR_ULTRASPARC, MASK_ISA,
{ MASK_ISA,
/* Although insns using %y are deprecated, it is a clear win. */
MASK_V9|MASK_DEPRECATED_V8_INSNS},
/* UltraSPARC III */
/* ??? Check if %y issue still holds true. */
{ "ultrasparc3", PROCESSOR_ULTRASPARC3, MASK_ISA,
{ MASK_ISA,
MASK_V9|MASK_DEPRECATED_V8_INSNS},
/* UltraSPARC T1 */
{ "niagara", PROCESSOR_NIAGARA, MASK_ISA,
{ MASK_ISA,
MASK_V9|MASK_DEPRECATED_V8_INSNS},
/* UltraSPARC T2 */
{ "niagara2", PROCESSOR_NIAGARA2, MASK_ISA, MASK_V9},
{ 0, (enum processor_type) 0, 0, 0 }
{ MASK_ISA, MASK_V9},
};
const struct cpu_table *cpu;
const struct sparc_cpu_select *sel;
int fpu;
#ifdef SUBTARGET_OVERRIDE_OPTIONS
......@@ -840,38 +784,24 @@ sparc_option_override (void)
fpu = target_flags & MASK_FPU; /* save current -mfpu status */
/* Set the default CPU. */
for (def = &cpu_default[0]; def->name; ++def)
if (def->cpu == TARGET_CPU_DEFAULT)
break;
gcc_assert (def->name);
sparc_select[0].string = def->name;
for (sel = &sparc_select[0]; sel->name; ++sel)
if (!global_options_set.x_sparc_cpu_and_features)
{
if (sel->string)
{
for (cpu = &cpu_table[0]; cpu->name; ++cpu)
if (! strcmp (sel->string, cpu->name))
{
if (sel->set_tune_p)
sparc_cpu = cpu->processor;
if (sel->set_arch_p)
{
target_flags &= ~cpu->disable;
target_flags |= cpu->enable;
}
break;
}
if (! cpu->name)
error ("bad value (%s) for %s switch", sel->string, sel->name);
}
for (def = &cpu_default[0]; def->cpu != -1; ++def)
if (def->cpu == TARGET_CPU_DEFAULT)
break;
gcc_assert (def->cpu != -1);
sparc_cpu_and_features = def->processor;
}
if (!global_options_set.x_sparc_cpu)
sparc_cpu = sparc_cpu_and_features;
cpu = &cpu_table[(int) sparc_cpu_and_features];
target_flags &= ~cpu->disable;
target_flags |= cpu->enable;
/* If -mfpu or -mno-fpu was explicitly used, don't override with
the processor default. */
if (fpu_option_set)
if (target_flags_explicit & MASK_FPU)
target_flags = (target_flags & ~MASK_FPU) | fpu;
/* Don't allow -mvis if FPU is disabled. */
......
gcc/config/sparc/sparc.h
......@@ -513,31 +513,6 @@ extern enum cmodel sparc_cmodel;
-mno-app-regs). */
#define TARGET_DEFAULT (MASK_APP_REGS + MASK_FPU)
/* Processor type.
These must match the values for the cpu attribute in sparc.md. */
enum processor_type {
PROCESSOR_V7,
PROCESSOR_CYPRESS,
PROCESSOR_V8,
PROCESSOR_SUPERSPARC,
PROCESSOR_HYPERSPARC,
PROCESSOR_LEON,
PROCESSOR_SPARCLITE,
PROCESSOR_F930,
PROCESSOR_F934,
PROCESSOR_SPARCLITE86X,
PROCESSOR_SPARCLET,
PROCESSOR_TSC701,
PROCESSOR_V9,
PROCESSOR_ULTRASPARC,
PROCESSOR_ULTRASPARC3,
PROCESSOR_NIAGARA,
PROCESSOR_NIAGARA2
};
/* This is set from -m{cpu,tune}=xxx. */
extern enum processor_type sparc_cpu;
/* Recast the cpu class to be the cpu attribute.
Every file includes us, but not every file includes insn-attr.h. */
#define sparc_cpu_attr ((enum attr_cpu) sparc_cpu)
......@@ -551,17 +526,6 @@ extern enum processor_type sparc_cpu;
{"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
{"tune", "%{!mtune=*:-mtune=%(VALUE)}" }, \
{"float", "%{!msoft-float:%{!mhard-float:%{!mfpu:%{!mno-fpu:-m%(VALUE)-float}}}}" }
/* sparc_select[0] is reserved for the default cpu. */
struct sparc_cpu_select
{
const char *string;
const char *const name;
const int set_tune_p;
const int set_arch_p;
};
extern struct sparc_cpu_select sparc_select[];
/* target machine storage layout */
......
gcc/config/sparc/sparc.opt
; Options for the SPARC port of the compiler
;
; Copyright (C) 2005, 2007, 2010 Free Software Foundation, Inc.
; Copyright (C) 2005, 2007, 2010, 2011 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
......@@ -18,6 +18,9 @@
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
HeaderInclude
config/sparc/sparc-opts.h
mfpu
Target Report Mask(FPU)
Use hardware FP
......@@ -83,13 +86,67 @@ Target
Optimize tail call instructions in assembler and linker
mcpu=
Target RejectNegative Joined
Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type)
Use features of and schedule code for given CPU
mtune=
Target RejectNegative Joined
Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type)
Schedule code for given CPU
Enum
Name(sparc_processor_type) Type(enum processor_type)
EnumValue
Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
EnumValue
Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
EnumValue
Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
EnumValue
Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
EnumValue
Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
EnumValue
Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
EnumValue
Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
EnumValue
Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
EnumValue
Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
EnumValue
Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
EnumValue
Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
EnumValue
Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
EnumValue
Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
EnumValue
Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
EnumValue
Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
EnumValue
Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
EnumValue
Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
mcmodel=
Target RejectNegative Joined Var(sparc_cmodel_string)
Use given SPARC-V9 code model
......
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