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Commit a95ec517 by Alexander Ivchenko Committed by Kirill Yukhin
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sse.md (avx512f_cmp<mode>3): Extend to support masking. 

        * config/i386/sse.md (avx512f_cmp<mode>3): Extend to support masking.
        (avx512f_ucmp<mode>3): Ditto.
        (avx512f_eq<mode>3): Ditto.
        (avx512f_gt<mode>3): Ditto.
        (avx512f_testm<mode>3): Ditto.
        (avx512f_testnm<mode>3): Ditto.
        * config/i386/subst.md (SUBST_S): New.
        (mask_scalar_merge_name): Ditto.
        (mask_scalar_merge_operand3): Ditto.
        (mask_scalar_merge_operand4): Ditto.
        (mask_scalar_merge): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>

From-SVN: r206080
parent 82b8950f
Showing with 51 additions and 13 deletions
gcc/ChangeLog
2013-11-13 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Sergey Lega <sergey.s.lega@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>
Ilya Tocar <ilya.tocar@intel.com>
Andrey Turetskiy <andrey.turetskiy@intel.com>
Ilya Verbin <ilya.verbin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/sse.md (avx512f_cmp<mode>3): Extend to support masking.
(avx512f_ucmp<mode>3): Ditto.
(avx512f_eq<mode>3): Ditto.
(avx512f_gt<mode>3): Ditto.
(avx512f_testm<mode>3): Ditto.
(avx512f_testnm<mode>3): Ditto.
* config/i386/subst.md (SUBST_S): New.
(mask_scalar_merge_name): Ditto.
(mask_scalar_merge_operand3): Ditto.
(mask_scalar_merge_operand4): Ditto.
(mask_scalar_merge): Ditto.
2013-12-17 Jan Hubicka <hubicka@ucw.cz>
PR middle-end/35535
gcc/config/i386/sse.md
......@@ -2099,7 +2099,7 @@
[(V16SF "const_0_to_31_operand") (V8DF "const_0_to_31_operand")
(V16SI "const_0_to_7_operand") (V8DI "const_0_to_7_operand")])
(define_insn "avx512f_cmp<mode>3"
(define_insn "avx512f_cmp<mode>3<mask_scalar_merge_name>"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
(unspec:<avx512fmaskmode>
[(match_operand:VI48F_512 1 "register_operand" "v")
......@@ -2107,13 +2107,13 @@
(match_operand:SI 3 "<cmp_imm_predicate>" "n")]
UNSPEC_PCMP))]
"TARGET_AVX512F"
"v<sseintprefix>cmp<ssemodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
"v<sseintprefix>cmp<ssemodesuffix>\t{%3, %2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %3}"
[(set_attr "type" "ssecmp")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
(define_insn "avx512f_ucmp<mode>3"
(define_insn "avx512f_ucmp<mode>3<mask_scalar_merge_name>"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
......@@ -2121,7 +2121,7 @@
(match_operand:SI 3 "const_0_to_7_operand" "n")]
UNSPEC_UNSIGNED_PCMP))]
"TARGET_AVX512F"
"vpcmpu<ssemodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
"vpcmpu<ssemodesuffix>\t{%3, %2, %1, %0<mask_scalar_merge_operand4>|%0<mask_scalar_merge_operand4>, %1, %2, %3}"
[(set_attr "type" "ssecmp")
(set_attr "length_immediate" "1")
(set_attr "prefix" "evex")
......@@ -8360,7 +8360,7 @@
(set_attr "prefix" "vex")
(set_attr "mode" "OI")])
(define_expand "avx512f_eq<mode>3"
(define_expand "avx512f_eq<mode>3<mask_scalar_merge_name>"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand")
......@@ -8369,14 +8369,14 @@
"TARGET_AVX512F"
"ix86_fixup_binary_operands_no_copy (EQ, <MODE>mode, operands);")
(define_insn "avx512f_eq<mode>3_1"
(define_insn "avx512f_eq<mode>3<mask_scalar_merge_name>_1"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "%v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")]
UNSPEC_MASKED_EQ))]
"TARGET_AVX512F && ix86_binary_operator_ok (EQ, <MODE>mode, operands)"
"vpcmpeq<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
"vpcmpeq<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
[(set_attr "type" "ssecmp")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "evex")
......@@ -8456,13 +8456,13 @@
(set_attr "prefix" "vex")
(set_attr "mode" "OI")])
(define_insn "avx512f_gt<mode>3"
(define_insn "avx512f_gt<mode>3<mask_scalar_merge_name>"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")] UNSPEC_MASKED_GT))]
"TARGET_AVX512F"
"vpcmpgt<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
"vpcmpgt<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
[(set_attr "type" "ssecmp")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "evex")
......@@ -8856,25 +8856,25 @@
]
(const_string "<sseinsnmode>")))])
(define_insn "avx512f_testm<mode>3"
(define_insn "avx512f_testm<mode>3<mask_scalar_merge_name>"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")]
UNSPEC_TESTM))]
"TARGET_AVX512F"
"vptestm<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
"vptestm<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
[(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
(define_insn "avx512f_testnm<mode>3"
(define_insn "avx512f_testnm<mode>3<mask_scalar_merge_name>"
[(set (match_operand:<avx512fmaskmode> 0 "register_operand" "=k")
(unspec:<avx512fmaskmode>
[(match_operand:VI48_512 1 "register_operand" "v")
(match_operand:VI48_512 2 "nonimmediate_operand" "vm")]
UNSPEC_TESTNM))]
"TARGET_AVX512CD"
"%vptestnm<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
"%vptestnm<ssemodesuffix>\t{%2, %1, %0<mask_scalar_merge_operand3>|%0<mask_scalar_merge_operand3>, %1, %2}"
[(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
......
gcc/config/i386/subst.md
......@@ -27,6 +27,9 @@
V16SF V8SF V4SF
V8DF V4DF V2DF])
(define_mode_iterator SUBST_S
[QI HI SI DI])
(define_subst_attr "mask_name" "mask" "" "_mask")
(define_subst_attr "mask_applied" "mask" "false" "true")
(define_subst_attr "mask_operand2" "mask" "" "%{%3%}%N2")
......@@ -54,3 +57,16 @@
(match_dup 1)
(match_operand:SUBST_V 2 "vector_move_operand" "0C")
(match_operand:<avx512fmaskmode> 3 "register_operand" "k")))])
(define_subst_attr "mask_scalar_merge_name" "mask_scalar_merge" "" "_mask")
(define_subst_attr "mask_scalar_merge_operand3" "mask_scalar_merge" "" "%{%3%}")
(define_subst_attr "mask_scalar_merge_operand4" "mask_scalar_merge" "" "%{%4%}")
(define_subst "mask_scalar_merge"
[(set (match_operand:SUBST_S 0)
(match_operand:SUBST_S 1))]
"TARGET_AVX512F"
[(set (match_dup 0)
(and:SUBST_S
(match_dup 1)
(match_operand:SUBST_S 3 "register_operand" "k")))])
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