re PR testsuite/87433 (gcc.dg/zero_bits_compound-1.c and…

re PR testsuite/87433 (gcc.dg/zero_bits_compound-1.c and gcc.target/aarch64/ashltidisi.c tests fail after combine two to two instruction patch on aarch64)

2018-09-28  Steve Ellcey  <sellcey@cavium.com>

	PR testsuite/87433
	* gcc.target/aarch64/ashltidisi.c: Expect 3 asr instructions
	instead of 4.

From-SVN: r264692

gcc/testsuite/ChangeLog

+2018-09-26  Steve Ellcey  <sellcey@cavium.com>
+
+	PR testsuite/87433
+	* gcc.target/aarch64/ashltidisi.c: Expect 3 asr instructions
+	instead of 4.
+
 2018-09-28  Steve Ellcey  <sellcey@cavium.com>
 
 	PR testsuite/87433

gcc/testsuite/gcc.target/aarch64/ashltidisi.c

@@ -45,5 +45,5 @@ main (int argc, char **argv)
   return 0;
 }
 
-/* { dg-final { scan-assembler-times "asr" 4 } } */
+/* { dg-final { scan-assembler-times "asr" 3 } } */
 /* { dg-final { scan-assembler-not "extr\t" } } */