Commit a8aa4e0b by J"orn Rennecke Committed by Joern Rennecke

final.c (shorten_branches): Remove conditionalizing on SHORTEN_WITH_ADJUST_INSN_LENGTH

	* final.c (shorten_branches): Remove conditionalizing on
	SHORTEN_WITH_ADJUST_INSN_LENGTH
	* sh.h, pa.h (SHORTEN_WITH_ADJUST_INSN_LENGTH): Remove.

From-SVN: r18470
parent 6af34885
Wed Mar 11 15:07:18 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
* final.c (shorten_branches): Remove conditionalizing on
SHORTEN_WITH_ADJUST_INSN_LENGTH
* sh.h, pa.h (SHORTEN_WITH_ADJUST_INSN_LENGTH): Remove.
Wed Mar 11 02:37:41 1998 Jeffrey A Law (law@cygnus.com) Wed Mar 11 02:37:41 1998 Jeffrey A Law (law@cygnus.com)
* flow.c (find_basic_blocks_1): Keep the cfg accurate when removing * flow.c (find_basic_blocks_1): Keep the cfg accurate when removing
......
...@@ -1926,9 +1926,6 @@ while (0) ...@@ -1926,9 +1926,6 @@ while (0)
#define ADJUST_INSN_LENGTH(INSN, LENGTH) \ #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
LENGTH += pa_adjust_insn_length (INSN, LENGTH); LENGTH += pa_adjust_insn_length (INSN, LENGTH);
/* Enable a bug fix. (This is for extra caution.) */
#define SHORTEN_WITH_ADJUST_INSN_LENGTH
/* Millicode insns are actually function calls with some special /* Millicode insns are actually function calls with some special
constraints on arguments and register usage. constraints on arguments and register usage.
......
...@@ -1788,9 +1788,6 @@ sh_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS) ...@@ -1788,9 +1788,6 @@ sh_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
&& GET_CODE (PATTERN (NEXT_INSN (PREV_INSN (X)))) != SEQUENCE \ && GET_CODE (PATTERN (NEXT_INSN (PREV_INSN (X)))) != SEQUENCE \
&& get_attr_needs_delay_slot (X) == NEEDS_DELAY_SLOT_YES) \ && get_attr_needs_delay_slot (X) == NEEDS_DELAY_SLOT_YES) \
(LENGTH) += 2; (LENGTH) += 2;
/* Enable a bug fix for the shorten_branches pass. */
#define SHORTEN_WITH_ADJUST_INSN_LENGTH
/* Define the codes that are matched by predicates in sh.c. */ /* Define the codes that are matched by predicates in sh.c. */
#define PREDICATE_CODES \ #define PREDICATE_CODES \
......
...@@ -1266,11 +1266,9 @@ shorten_branches (first) ...@@ -1266,11 +1266,9 @@ shorten_branches (first)
insn = NEXT_INSN (insn)) insn = NEXT_INSN (insn))
{ {
int new_length; int new_length;
#ifdef SHORTEN_WITH_ADJUST_INSN_LENGTH
#ifdef ADJUST_INSN_LENGTH #ifdef ADJUST_INSN_LENGTH
int tmp_length; int tmp_length;
#endif #endif
#endif
int length_align; int length_align;
uid = INSN_UID (insn); uid = INSN_UID (insn);
...@@ -1444,14 +1442,12 @@ shorten_branches (first) ...@@ -1444,14 +1442,12 @@ shorten_branches (first)
insn_current_address += new_length; insn_current_address += new_length;
} }
#ifdef SHORTEN_WITH_ADJUST_INSN_LENGTH
#ifdef ADJUST_INSN_LENGTH #ifdef ADJUST_INSN_LENGTH
/* If needed, do any adjustment. */ /* If needed, do any adjustment. */
tmp_length = new_length; tmp_length = new_length;
ADJUST_INSN_LENGTH (insn, new_length); ADJUST_INSN_LENGTH (insn, new_length);
insn_current_address += (new_length - tmp_length); insn_current_address += (new_length - tmp_length);
#endif #endif
#endif
if (new_length != insn_lengths[uid]) if (new_length != insn_lengths[uid])
{ {
......
...@@ -3900,8 +3900,7 @@ not specified, 0 is used. ...@@ -3900,8 +3900,7 @@ not specified, 0 is used.
If defined, modifies the length assigned to instruction @var{insn} as a If defined, modifies the length assigned to instruction @var{insn} as a
function of the context in which it is used. @var{length} is an lvalue function of the context in which it is used. @var{length} is an lvalue
that contains the initially computed length of the insn and should be that contains the initially computed length of the insn and should be
updated with the correct length of the insn. If updating is required, updated with the correct length of the insn.
@var{insn} must not be a varying-length insn.
This macro will normally not be required. A case in which it is This macro will normally not be required. A case in which it is
required is the ROMP. On this machine, the size of an @code{addr_vec} required is the ROMP. On this machine, the size of an @code{addr_vec}
......
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