Commit a7e94dc0 by Michael Meissner Committed by Michael Meissner

re PR target/87033 (The compiler does not generate the LWAX instruction)

[gcc]
2018-08-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/87033
	* config/rs6000/rs6000.md (extendsi<mode>2): Change constraints
	from 'Y' to 'YZ' to enable the LWAX instruction to be generated
	for indexed loads.

[gcc/testsuite]
2018-08-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/87033
	* gcc.target/powerpc/pr87033.c: New test.

From-SVN: r263678
parent fe7a679e
2018-08-20 Michael Meissner <meissner@linux.ibm.com>
PR target/87033
* config/rs6000/rs6000.md (extendsi<mode>2): Change constraints
from 'Y' to 'YZ' to enable the LWAX instruction to be generated
for indexed loads.
2018-08-20 Nathan Sidwell <nathan@acm.org>
Jeff Law <law@redhat.com>
......
......@@ -988,7 +988,7 @@
"=r, r, wl, wu, wj, wK, wH, wr")
(sign_extend:EXTSI (match_operand:SI 1 "lwa_operand"
"Y, r, Z, Z, r, wK, wH, ?wIwH")))]
"YZ, r, Z, Z, r, wK, wH, ?wIwH")))]
""
"@
lwa%U1%X1 %0,%1
......
2018-08-20 Michael Meissner <meissner@linux.ibm.com>
PR target/87033
* gcc.target/powerpc/pr87033.c: New test.
2018-08-20 Martin Sebor <msebor@redhat.com>
PR tree-optimization/87034
......
/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
/* { dg-options "-O2" } */
/* Insure that a LWAX is generated instead of ADD + LWA. LP64 is needed
because the LWA and LWAX instructions are only available in 64-bit mode. */
long func (int *p, unsigned long n)
{
return p[n];
}
/* { dg-final { scan-assembler {\mlwax\M} } } */
/* { dg-final { scan-assembler-not {\mlwa\M} } } */
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