re PR rtl-optimization/24683 (ICE in in extract_insn, at recog.c:2084)

./:	PR rtl-optimization/24683
	* config/i386/i386.c (legitimize_pic_address): If constant operand
	to PLUS is too large, put it in a register.
testsuite/:
	PR rtl-optimization/24683
	* gcc.dg/pr24683.c: New test.

From-SVN: r106601

gcc/ChangeLog

+2005-11-07  Ian Lance Taylor  <ian@airs.com>
+
+	PR rtl-optimization/24683
+	* config/i386/i386.c (legitimize_pic_address): If constant operand
+	to PLUS is too large, put it in a register.
+
 2005-11-07  Jie Zhang  <jie.zhang@analog.com>
 
 	* configure.ac: Enable checking assembler dwarf2 support for bfin

gcc/config/i386/i386.c

@@ -6178,7 +6178,11 @@ legitimize_pic_address (rtx orig, rtx reg)
 		{
 		  if (INTVAL (op1) < -16*1024*1024
 		      || INTVAL (op1) >= 16*1024*1024)
-		    new = gen_rtx_PLUS (Pmode, force_reg (Pmode, op0), op1);
+		    {
+		      if (!x86_64_immediate_operand (op1, Pmode))
+			op1 = force_reg (Pmode, op1);
+		      new = gen_rtx_PLUS (Pmode, force_reg (Pmode, op0), op1);
+		    }
 		}
 	    }
 	  else

gcc/testsuite/ChangeLog

+2005-11-07  Ian Lance Taylor  <ian@airs.com>
+
+	PR rtl-optimization/24683
+	* gcc.dg/pr24683.c: New test.
+
 2005-11-07  Uros Bizjak  <uros@kss-loka.si>
 
 	* gcc.dg/vect/pr24225.c: Add cleanup-coverage-files.

gcc/testsuite/gcc.dg/pr24683.c

+/* { dg-do compile { target fpic } } */
+/* { dg-options "-O2 -fPIC" } */
+int *block;
+void final(unsigned int j)
+{
+  unsigned int i;
+  unsigned char *data = (unsigned char *)"\0";
+  for (i = 0; i < 8; i++)
+    for (; j + 63 < 1; j += 64)
+      block = (int *) &data[j];
+}