Skip to content

R
riscv-gcc-1
Commit a711887e by Uros Bizjak
Options

re PR rtl-optimization/78952 (Combine does not convert 8-bit sign-extract to a… 

re PR rtl-optimization/78952 (Combine does not convert 8-bit sign-extract to a zero-extract for QImode operations)

	PR rtl-optimization/78952
	* config/i386/i386.md (any_extract): New code iterator.
	(*insvqi_2): Use any_extract for source operand.
	(*insvqi_3): Use any_shiftrt for source operand.

testsuite/ChangeLog:

	PR rtl-optimization/78952
	* gcc.target/i386/pr78952-1.c: New test.
	* gcc.target/i386/pr78952-2.c: Ditto.

From-SVN: r244591
parent 525a5e33
Showing with 72 additions and 15 deletions
gcc/ChangeLog
2017-01-18 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/78952
* config/i386/i386.md (any_extract): New code iterator.
(*insvqi_2): Use any_extract for source operand.
(*insvqi_3): Use any_shiftrt for source operand.
2017-01-18 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_sched_adjust_priority)
......@@ -15,7 +22,7 @@
2017-01-18 Matthias Klose <doko@ubuntu.com>
* doc/install.texi: Allow default for --with-target-bdw-gc-include.
* doc/install.texi: Allow default for --with-target-bdw-gc-include.
2016-01-18 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
......@@ -41,12 +48,6 @@
(s390_valid_target_attribute_inner_p): Likewise.
* config/s390/s390.md ("tabort"): Likewise.
2017-01-18 Jakub Jelinek <jakub@redhat.com>
* gcc.target/s390/target-attribute/tattr-2.c: Add -fno-ipa-icf
to dg-options.
(p0): Add missing dg-error.
2017-01-18 Toma Tabacu <toma.tabacu@imgtec.com>
* config/mips/mips.h (ISA_HAS_DIV3): Remove unused macro.
......
gcc/config/i386/i386.md
......@@ -2960,13 +2960,15 @@
(subreg:SI (match_dup 1) 0))
(unspec [(const_int 0)] UNSPEC_NOREX_MEM)])])
(define_code_iterator any_extract [sign_extract zero_extract])
(define_insn "*insvqi_2"
[(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
(const_int 8)
(const_int 8))
(zero_extract:SI (match_operand 1 "ext_register_operand" "Q")
(const_int 8)
(const_int 8)))]
(any_extract:SI (match_operand 1 "ext_register_operand" "Q")
(const_int 8)
(const_int 8)))]
""
"mov{b}\t{%h1, %h0|%h0, %h1}"
[(set_attr "type" "imov")
......@@ -2976,8 +2978,8 @@
[(set (zero_extract:SI (match_operand 0 "ext_register_operand" "+Q")
(const_int 8)
(const_int 8))
(lshiftrt:SI (match_operand:SI 1 "register_operand" "Q")
(const_int 8)))]
(any_shiftrt:SI (match_operand:SI 1 "register_operand" "Q")
(const_int 8)))]
""
"mov{b}\t{%h1, %h0|%h0, %h1}"
[(set_attr "type" "imov")
......
gcc/testsuite/ChangeLog
2017-01-18 Uros Bizjak <ubizjak@gmail.com>
PR rtl-optimization/78952
* gcc.target/i386/pr78952-1.c: New test.
* gcc.target/i386/pr78952-2.c: Ditto.
2017-01-18 Andre Vehreschild <vehre@gcc.gnu.org>
* gfortran.dg/coarray_alloc_with_implicit_sync_2.f90: New test.
......@@ -46,6 +52,12 @@
PR c++/79091
* g++.dg/pr79091.C: New.
2017-01-18 Jakub Jelinek <jakub@redhat.com>
* gcc.target/s390/target-attribute/tattr-2.c: Add -fno-ipa-icf
to dg-options.
(p0): Add missing dg-error.
2017-01-17 Joe Seymour <joe.s@somniumtech.com>
* gcc.target/msp430/mul_f5_muldef.c: New test.
......@@ -177,7 +189,7 @@
2017-01-16 Paolo Carlini <paolo.carlini@oracle.com>
Revert:
2017-01-16 Paolo Carlini <paolo.carlini@oracle.com>
2017-01-16 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/71737
* g++.dg/cpp0x/pr71737.C: New.
......@@ -198,8 +210,8 @@
2017-01-14 Bernd Schmidt <bschmidt@redhat.com>
PR rtl-optimization/78626
PR rtl-optimization/78727
PR rtl-optimization/78626
PR rtl-optimization/78727
* gcc.dg/torture/pr78626.c: New test.
* gcc.dg/torture/pr78727.c: New test.
......
gcc/testsuite/gcc.target/i386/pr78952-1.c 0 → 100644
/* PR target/78952 */
/* { dg-do compile } */
/* { dg-options "-O2 -masm=att" } */
/* { dg-additional-options "-mregparm=3" { target ia32 } } */
/* { dg-final { scan-assembler-not "movsbl" } } */
struct S1
{
char pad1;
char val;
short pad2;
};
struct S1 foo (struct S1 a, struct S1 b)
{
a.val = b.val;
return a;
}
/* { dg-final { scan-assembler "\[ \t\]movb\[ \t\]+%.h, %.h" } } */
gcc/testsuite/gcc.target/i386/pr78952-2.c 0 → 100644
/* PR target/78952 */
/* { dg-do compile } */
/* { dg-options "-O2 -masm=att" } */
/* { dg-additional-options "-mregparm=3" { target ia32 } } */
/* { dg-final { scan-assembler-not "sarl" } } */
struct S1
{
char pad1;
char val;
short pad2;
};
struct S1 foo (struct S1 a, int b)
{
a.val = b >> 8;
return a;
}
/* { dg-final { scan-assembler "\[ \t\]movb\[ \t\]+%.h, %.h" } } */
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment