i386.md (subsi3_carry_zext): Remove "m" constraint for "register_operand".

	* config/i386/i386.md (subsi3_carry_zext): Remove "m" constraint for
	"register_operand".
	(*iorsi_1_zext): Likewise.
	(*iorsi_1_zext_imm): Likewise.
	* config/i386/sse.md: (*sse4_1_extractps): Use "nonimmediate_operand"
	with "rm"/"xm" constraint.
	(sse2_vmsqrtv2df2): Likewise.

From-SVN: r127515

gcc/ChangeLog

+2007-08-15  Rask Ingemann Lambertsen  <rask@sygehus.dk>
+
+	* config/i386/i386.md (subsi3_carry_zext): Remove "m" constraint for
+	"register_operand".
+	(*iorsi_1_zext): Likewise.
+	(*iorsi_1_zext_imm): Likewise.
+	* config/i386/sse.md: (*sse4_1_extractps): Use "nonimmediate_operand"
+	with "rm"/"xm" constraint.
+	(sse2_vmsqrtv2df2): Likewise.
+
 2007-08-15  Jakub Jelinek  <jakub@redhat.com>
 
 	PR middle-end/33074

gcc/config/i386/i386.md

@@ -6722,11 +6722,11 @@
    (set_attr "mode" "SI")])
 
 (define_insn "subsi3_carry_zext"
-  [(set (match_operand:DI 0 "register_operand" "=rm,r")
+  [(set (match_operand:DI 0 "register_operand" "=r")
 	  (zero_extend:DI
-	    (minus:SI (match_operand:SI 1 "register_operand" "0,0")
+	    (minus:SI (match_operand:SI 1 "register_operand" "0")
 	      (plus:SI (match_operand:SI 3 "ix86_carry_flag_operator" "")
-		 (match_operand:SI 2 "general_operand" "ri,rm")))))
+		 (match_operand:SI 2 "general_operand" "rim")))))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
   "sbb{l}\t{%2, %k0|%k0, %2}"
@@ -8738,7 +8738,7 @@
 
 ;; See comment for addsi_1_zext why we do use nonimmediate_operand
 (define_insn "*iorsi_1_zext"
-  [(set (match_operand:DI 0 "register_operand" "=rm")
+  [(set (match_operand:DI 0 "register_operand" "=r")
 	(zero_extend:DI
 	  (ior:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
 		  (match_operand:SI 2 "general_operand" "rim"))))
@@ -8749,7 +8749,7 @@
    (set_attr "mode" "SI")])
 
 (define_insn "*iorsi_1_zext_imm"
-  [(set (match_operand:DI 0 "register_operand" "=rm")
+  [(set (match_operand:DI 0 "register_operand" "=r")
 	(ior:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0"))
 		(match_operand:DI 2 "x86_64_zext_immediate_operand" "Z")))
    (clobber (reg:CC FLAGS_REG))]

gcc/config/i386/sse.md

@@ -1532,7 +1532,7 @@
 })
 
 (define_insn "*sse4_1_extractps"
-  [(set (match_operand:SF 0 "register_operand" "=rm")
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=rm")
 	(vec_select:SF
 	  (match_operand:V4SF 1 "register_operand" "x")
 	  (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n")])))]
@@ -1694,7 +1694,7 @@
 (define_insn "sse2_vmsqrtv2df2"
   [(set (match_operand:V2DF 0 "register_operand" "=x")
 	(vec_merge:V2DF
-	  (sqrt:V2DF (match_operand:V2DF 1 "register_operand" "xm"))
+	  (sqrt:V2DF (match_operand:V2DF 1 "nonimmediate_operand" "xm"))
 	  (match_operand:V2DF 2 "register_operand" "0")
 	  (const_int 1)))]
   "TARGET_SSE2"