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riscv-gcc-1
Commit a65c591c by David Edelsohn
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rs6000.h (PREDICATE_CODES): Add any_operand and zero_constant. 

	* config/rs6000/rs6000.h (PREDICATE_CODES): Add any_operand and
	zero_constant.
	* config/rs6000/rs6000.md (addsi3): Optimize sign extension.
	(adddi3): Likewise.
	(movdf): Likewise.
	(movdi): Likewise.
	(cmpsi splitter): Likewise.
	(modsi3): Fail if <= 0.
	* config/rs6000/rs6000.c (reg_or_add_cint64_operand): Remove
	redundant test when HOST_BITS_PER_WIDE_INT != 32.
	(reg_or_sub_cint64_operand): Likewise.
	(num_insns_constant_wide): Optimize sign extension.
	(rs6000_legitimize_address):: Likewise.
	(easy_fp_constant): Fix formatting.

From-SVN: r50658
parent 17720332
Showing with 48 additions and 26 deletions
gcc/ChangeLog
2002-03-12 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.h (PREDICATE_CODES): Add any_operand and
zero_constant.
* config/rs6000/rs6000.c (easy_fp_constant): Fix formatting.
2002-03-12 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000.md (addsi3): Optimize sign extension.
(adddi3): Likewise.
(movdf): Likewise.
(movdi): Likewise.
(cmpsi splitter): Likewise.
(modsi3): Fail if <= 0.
* config/rs6000/rs6000.c (reg_or_add_cint64_operand): Remove
redundant test when HOST_BITS_PER_WIDE_INT != 32.
(reg_or_sub_cint64_operand): Likewise.
(num_insns_constant_wide): Optimize sign extension.
(rs6000_legitimize_address): Likewise.
2002-03-12 Andrew MacLeod <amacleod@redhat.com>
* config/sparc/linux.h (HANDLE_PRAGMA_PACK_PUSH_POP): Define.
......@@ -93,6 +113,8 @@
* alias.c (record_component_aliases): Record aliases for base
classes too.
2002-03-11 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.h (REG_ALLOC_ORDER): Add missing register.
2002-03-11 Douglas B Rupp <rupp@gnat.com>
......
gcc/config/rs6000/rs6000.c
......@@ -934,8 +934,9 @@ reg_or_add_cint64_operand (op, mode)
{
return (gpc_reg_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
#if HOST_BITS_PER_WIDE_INT == 32
&& INTVAL (op) < 0x7fff8000
#if HOST_BITS_PER_WIDE_INT != 32
#else
&& ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80008000)
< 0x100000000ll)
#endif
......@@ -952,8 +953,9 @@ reg_or_sub_cint64_operand (op, mode)
{
return (gpc_reg_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
#if HOST_BITS_PER_WIDE_INT == 32
&& (- INTVAL (op)) < 0x7fff8000
#if HOST_BITS_PER_WIDE_INT != 32
#else
&& ((unsigned HOST_WIDE_INT) ((- INTVAL (op)) + 0x80008000)
< 0x100000000ll)
#endif
......@@ -1035,20 +1037,16 @@ num_insns_constant_wide (value)
#if HOST_BITS_PER_WIDE_INT == 64
else if (TARGET_POWERPC64)
{
HOST_WIDE_INT low = value & 0xffffffff;
HOST_WIDE_INT high = value >> 32;
low = (low ^ 0x80000000) - 0x80000000; /* sign extend */
HOST_WIDE_INT low = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000;
HOST_WIDE_INT high = value >> 31;
if (high == 0 && (low & 0x80000000) == 0)
if (high == 0 || high == -1)
return 2;
else if (high == -1 && (low & 0x80000000) != 0)
return 2;
high >>= 1;
else if (! low)
if (low == 0)
return num_insns_constant_wide (high) + 1;
else
return (num_insns_constant_wide (high)
+ num_insns_constant_wide (low) + 1);
......@@ -1171,8 +1169,8 @@ easy_fp_constant (op, mode)
REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1);
return (num_insns_constant_wide ((HOST_WIDE_INT) k[0]) == 1
&& num_insns_constant_wide ((HOST_WIDE_INT) k[1]) == 1);
}
else if (mode == SFmode)
......@@ -1782,10 +1780,8 @@ rs6000_legitimize_address (x, oldx, mode)
{
HOST_WIDE_INT high_int, low_int;
rtx sum;
high_int = INTVAL (XEXP (x, 1)) & (~ (HOST_WIDE_INT) 0xffff);
low_int = INTVAL (XEXP (x, 1)) & 0xffff;
if (low_int & 0x8000)
high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16;
low_int = ((INTVAL (XEXP (x, 1)) & 0xffff) ^ 0x8000) - 0x8000;
high_int = INTVAL (XEXP (x, 1)) - low_int;
sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (x, 0),
GEN_INT (high_int)), 0);
return gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int));
......
gcc/config/rs6000/rs6000.h
......@@ -2721,6 +2721,10 @@ extern char rs6000_reg_names[][8]; /* register names (0 vs. %r0). */
/* Define the codes that are matched by predicates in rs6000.c. */
#define PREDICATE_CODES \
{"any_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM}}, \
{"zero_constant", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM}}, \
{"short_cint_operand", {CONST_INT}}, \
{"u_short_cint_operand", {CONST_INT}}, \
{"non_short_cint_operand", {CONST_INT}}, \
......
gcc/config/rs6000/rs6000.md
......@@ -1631,7 +1631,7 @@
? operands[0] : gen_reg_rtx (SImode));
HOST_WIDE_INT val = INTVAL (operands[2]);
HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000);
HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;
HOST_WIDE_INT rest = trunc_int_for_mode (val - low, SImode);
/* The ordering here is important for the prolog expander.
......@@ -1740,7 +1740,7 @@
"
{
HOST_WIDE_INT val = INTVAL (operands[2]);
HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000);
HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;
HOST_WIDE_INT rest = trunc_int_for_mode (val - low, SImode);
operands[3] = GEN_INT (rest);
......@@ -2538,7 +2538,7 @@
rtx temp2;
if (GET_CODE (operands[2]) != CONST_INT
|| INTVAL (operands[2]) < 0
|| INTVAL (operands[2]) <= 0
|| (i = exact_log2 (INTVAL (operands[2]))) < 0)
FAIL;
......@@ -5812,7 +5812,7 @@
? operands[0] : gen_reg_rtx (DImode));
HOST_WIDE_INT val = INTVAL (operands[2]);
HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000);
HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;
HOST_WIDE_INT rest = trunc_int_for_mode (val - low, DImode);
if (!CONST_OK_FOR_LETTER_P (rest, 'L'))
......@@ -5915,7 +5915,7 @@
"
{
HOST_WIDE_INT val = INTVAL (operands[2]);
HOST_WIDE_INT low = (val & 0xffff) - 2 * (val & 0x8000);
HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;
HOST_WIDE_INT rest = trunc_int_for_mode (val - low, DImode);
operands[4] = GEN_INT (low);
......@@ -7769,7 +7769,7 @@
""
"")
(define_insn ""
(define_insn "*movcc_internal1"
[(set (match_operand:CC 0 "nonimmediate_operand" "=y,x,y,r,r,r,r,m")
(match_operand:CC 1 "nonimmediate_operand" "y,r,r,x,y,r,m,r"))]
"register_operand (operands[0], CCmode)
......@@ -7884,7 +7884,7 @@
operands[4] = (value & 0x80000000) ? constm1_rtx : const0_rtx;
#else
operands[4] = GEN_INT (value >> 32);
operands[1] = GEN_INT ((value & 0x7fffffff) - (value & 0x80000000));
operands[1] = GEN_INT (((value & 0xffffffff) ^ 0x80000000) - 0x80000000);
#endif
}")
......@@ -8370,7 +8370,7 @@
operands[4] = (value & 0x80000000) ? constm1_rtx : const0_rtx;
#else
operands[4] = GEN_INT (value >> 32);
operands[1] = GEN_INT ((value & 0x7fffffff) - (value & 0x80000000));
operands[1] = GEN_INT (((value & 0xffffffff) ^ 0x80000000) - 0x80000000);
#endif
}")
......@@ -10445,7 +10445,7 @@
with C to get the sign-extended value. */
HOST_WIDE_INT c = INTVAL (operands[2]);
HOST_WIDE_INT sextc = (c & 0x7fff) - (c & 0x8000);
HOST_WIDE_INT sextc = ((c & 0xffff) ^ 0x8000) - 0x8000;
HOST_WIDE_INT xorv = c ^ sextc;
operands[4] = GEN_INT (xorv);
......
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