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riscv-gcc-1
Commit a651f222 by Michael Meissner
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Use split_double to break apart CONST_DOUBLEs 

From-SVN: r12907
parent f5089633
Showing with 38 additions and 16 deletions
gcc/config/rs6000/rs6000.md
...@@ -5583,8 +5583,7 @@ ...@@ -5583,8 +5583,7 @@
{ {
operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0);
operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0);
operands[4] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); split_double (operands[1], &operands[4], &operands[5]);
operands[5] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
}") }")
(define_split (define_split
...@@ -5596,11 +5595,16 @@ ...@@ -5596,11 +5595,16 @@
(set (match_dup 2) (ior:SI (match_dup 2) (match_dup 6)))] (set (match_dup 2) (ior:SI (match_dup 2) (match_dup 6)))]
" "
{ {
HOST_WIDE_INT high = CONST_DOUBLE_HIGH (operands[1]); rtx high_rtx, low_rtx;
HOST_WIDE_INT low = CONST_DOUBLE_LOW (operands[1]); HOST_WIDE_INT high;
HOST_WIDE_INT low;
rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0);
rtx low_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); rtx low_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0);
split_double (operands[1], &high_rtx, &low_rtx);
high = INTVAL (high_rtx);
low = INTVAL (low_rtx);
if (((unsigned HOST_WIDE_INT) (low + 0x8000) < 0x10000) if (((unsigned HOST_WIDE_INT) (low + 0x8000) < 0x10000)
|| (low & 0xffff) == 0) || (low & 0xffff) == 0)
{ {
...@@ -5630,8 +5634,13 @@ ...@@ -5630,8 +5634,13 @@
(set (match_dup 3) (ior:SI (match_dup 3) (match_dup 7)))] (set (match_dup 3) (ior:SI (match_dup 3) (match_dup 7)))]
" "
{ {
HOST_WIDE_INT high = CONST_DOUBLE_HIGH (operands[1]); rtx high_rtx, low_rtx;
HOST_WIDE_INT low = CONST_DOUBLE_LOW (operands[1]); HOST_WIDE_INT high;
HOST_WIDE_INT low;
split_double (operands[1], &high_rtx, &low_rtx);
high = INTVAL (high_rtx);
low = INTVAL (low_rtx);
operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0);
operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0);
...@@ -5793,8 +5802,10 @@ ...@@ -5793,8 +5802,10 @@
if (GET_CODE (operands[1]) == CONST_DOUBLE) if (GET_CODE (operands[1]) == CONST_DOUBLE)
{ {
low = CONST_DOUBLE_LOW (operands[1]); rtx high_rtx, low_rtx;
high = CONST_DOUBLE_HIGH (operands[1]); split_double (operands[1], &high_rtx, &low_rtx);
high = INTVAL (high_rtx);
low = INTVAL (low_rtx);
} }
else else
#if HOST_BITS_PER_WIDE_INT == 32 #if HOST_BITS_PER_WIDE_INT == 32
...@@ -5932,8 +5943,7 @@ ...@@ -5932,8 +5943,7 @@
{ {
operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0);
operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0);
operands[4] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); split_double (operands[1], &operands[4], &operands[5]);
operands[5] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
}") }")
(define_split (define_split
...@@ -5945,11 +5955,16 @@ ...@@ -5945,11 +5955,16 @@
(set (match_dup 2) (ior:SI (match_dup 2) (match_dup 6)))] (set (match_dup 2) (ior:SI (match_dup 2) (match_dup 6)))]
" "
{ {
HOST_WIDE_INT high = CONST_DOUBLE_HIGH (operands[1]); rtx high_rtx, low_rtx;
HOST_WIDE_INT low = CONST_DOUBLE_LOW (operands[1]); HOST_WIDE_INT high;
HOST_WIDE_INT low;
rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); rtx high_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0);
rtx low_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); rtx low_reg = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0);
split_double (operands[1], &high_rtx, &low_rtx);
high = INTVAL (high_rtx);
low = INTVAL (low_rtx);
if (((unsigned HOST_WIDE_INT) (low + 0x8000) < 0x10000) if (((unsigned HOST_WIDE_INT) (low + 0x8000) < 0x10000)
|| (low & 0xffff) == 0) || (low & 0xffff) == 0)
{ {
...@@ -5979,8 +5994,13 @@ ...@@ -5979,8 +5994,13 @@
(set (match_dup 3) (ior:SI (match_dup 3) (match_dup 7)))] (set (match_dup 3) (ior:SI (match_dup 3) (match_dup 7)))]
" "
{ {
HOST_WIDE_INT high = CONST_DOUBLE_HIGH (operands[1]); rtx high_rtx, low_rtx;
HOST_WIDE_INT low = CONST_DOUBLE_LOW (operands[1]); HOST_WIDE_INT high;
HOST_WIDE_INT low;
split_double (operands[1], &high_rtx, &low_rtx);
high = INTVAL (high_rtx);
low = INTVAL (low_rtx);
operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0); operands[2] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN == 0);
operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0); operands[3] = gen_rtx (SUBREG, SImode, operands[0], WORDS_BIG_ENDIAN != 0);
...@@ -6042,8 +6062,10 @@ ...@@ -6042,8 +6062,10 @@
if (GET_CODE (operands[1]) == CONST_DOUBLE) if (GET_CODE (operands[1]) == CONST_DOUBLE)
{ {
low = CONST_DOUBLE_LOW (operands[1]); rtx high_rtx, low_rtx;
high = CONST_DOUBLE_HIGH (operands[1]); split_double (operands[1], &high_rtx, &low_rtx);
high = INTVAL (high_rtx);
low = INTVAL (low_rtx);
} }
else else
#if HOST_BITS_PER_WIDE_INT == 32 #if HOST_BITS_PER_WIDE_INT == 32
......
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