re PR target/88541 (VPCLMULQDQ 256-bit inline function unavailable with…

re PR target/88541 (VPCLMULQDQ 256-bit inline function unavailable with optimization but without enabled AVX512VL support)

	PR target/88541
	* config/i386/vpclmulqdqintrin.h (_mm256_clmulepi64_epi128): Enable
	for -mavx -mvpclmulqdq rather than just for -mavx512vl -mvpclmulqdq.

	* gcc.target/i386/avx-vpclmulqdq-1.c: New test.

From-SVN: r267254

gcc/config/i386/vpclmulqdqintrin.h

@@ -53,9 +53,9 @@ _mm512_clmulepi64_epi128 (__m512i __A, __m512i __B, const int __C)
 #pragma GCC pop_options
 #endif /* __DISABLE_VPCLMULQDQF__ */
 
-#if !defined(__VPCLMULQDQ__) || !defined(__AVX512VL__)
+#if !defined(__VPCLMULQDQ__) || !defined(__AVX__)
 #pragma GCC push_options
-#pragma GCC target("vpclmulqdq,avx512vl")
+#pragma GCC target("vpclmulqdq,avx")
 #define __DISABLE_VPCLMULQDQ__
 #endif /* __VPCLMULQDQ__ */
 
@@ -78,6 +78,4 @@ _mm256_clmulepi64_epi128 (__m256i __A, __m256i __B, const int __C)
 #pragma GCC pop_options
 #endif /* __DISABLE_VPCLMULQDQ__ */
 
-
 #endif /* _VPCLMULQDQINTRIN_H_INCLUDED */
-

gcc/testsuite/gcc.target/i386/avx-vpclmulqdq-1.c

+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx -mvpclmulqdq" } */
+
+#include <x86intrin.h>
+
+__m256i
+foo (__m256i x, __m256i y)
+{
+  return _mm256_clmulepi64_epi128 (x, y, 0);
+}