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riscv-gcc-1
Commit a5cc4aa9 by Tom Wood
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(load store patterns): Prepend loads and stores with %V and %v to track the type… 

(load store patterns): Prepend loads and stores with %V and %v to track the type and address of the access.

(load store patterns): Prepend loads and stores with %V
	and %v to track the type and address of the access.
(call_movstrsi_loop): Renamed from call_block_move_loop.
	Use call-value for the block move patterns.

From-SVN: r2153
parent 1039fa46
Showing with 40 additions and 38 deletions
gcc/config/m88k/m88k.md
......@@ -28,7 +28,7 @@
(define_expand "m88k_sccs_id"
[(match_operand:SI 0 "" "")]
""
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.7.8 08/26/92 13:41:44\";
"{ static char sccs_id[] = \"@(#)m88k.md 2.2.12.1 09/12/92 07:08:29\";
FAIL; }")
;; Attribute specifications
......@@ -1455,15 +1455,15 @@
|| operands[1] == const0_rtx)"
"@
or %0,%#r0,%1
ld %0,%1
st %r1,%0
%V1ld %0,%1
%v0st %r1,%0
subu %0,%#r0,%n1
set %0,%#r0,%s1
mov.s %0,%1
mov.s %0,%1
mov %0,%1
ld %0,%1
st %1,%0"
%V1ld %0,%1
%v0st %1,%0"
[(set_attr "type" "arith,load,store,arith,bit,mov,mov,mov,load,store")])
(define_insn ""
......@@ -1512,8 +1512,8 @@
|| operands[1] == const0_rtx)"
"@
or %0,%#r0,%h1
ld.hu %0,%1
st.h %r1,%0
%V1ld.hu %0,%1
%v0st.h %r1,%0
subu %0,%#r0,%H1"
[(set_attr "type" "arith,load,store,arith")])
......@@ -1544,8 +1544,8 @@
|| operands[1] == const0_rtx)"
"@
or %0,%#r0,%q1
ld.bu %0,%1
st.b %r1,%0
%V1ld.bu %0,%1
%v0st.b %r1,%0
subu %r0,%#r0,%Q1"
[(set_attr "type" "arith,load,store,arith")])
......@@ -1583,13 +1583,13 @@
""
"@
or %0,%#r0,%1\;or %d0,%#r0,%d1
ld.d %0,%1
st.d %1,%0
%V1ld.d %0,%1
%v0st.d %1,%0
mov.d %0,%1
mov.d %0,%1
mov %0,%1
ld.d %0,%1
st.d %1,%0"
%V1ld.d %0,%1
%v0st.d %1,%0"
[(set_attr "type" "marith,loadd,store,mov,mov,mov,loadd,store")])
(define_insn ""
......@@ -1637,7 +1637,7 @@
; return \"or %0,%#r0,0\;or %d0,%#r0,0\";
; case 1:
; operands[1] = adj_offsettable_operand (operands[0], 4);
; return \"st %#r0,%0\;st %#r0,%1\";
; return \"%v0st %#r0,%0\;st %#r0,%1\";
; }
;}")
......@@ -1656,13 +1656,13 @@
""
"@
or %0,%#r0,%1\;or %d0,%#r0,%d1
ld.d %0,%1
st.d %1,%0
%V1ld.d %0,%1
%v0st.d %1,%0
mov.d %0,%1
mov.d %0,%1
mov %0,%1
ld.d %0,%1
st.d %1,%0"
%V1ld.d %0,%1
%v0st.d %1,%0"
[(set_attr "type" "marith,loadd,store,mov,mov,mov,loadd,store")])
(define_insn ""
......@@ -1708,13 +1708,13 @@
""
"@
or %0,%#r0,%1
ld %0,%1
st %r1,%0
%V1ld %0,%1
%v0st %r1,%0
mov.s %0,%1
mov.s %0,%1
mov %0,%1
ld %0,%1
st %r1,%0"
%V1ld %0,%1
%v0st %r1,%0"
[(set_attr "type" "arith,load,store,mov,mov,mov,load,store")])
(define_insn ""
......@@ -1767,17 +1767,18 @@
(use (reg:SI 2))
(use (reg:SI 3))
(use (match_dup 5))
(parallel [(call (mem:SI (match_operand 0 "" ""))
(const_int 0))
(parallel [(set (reg:DI 2)
(call (mem:SI (match_operand 0 "" ""))
(const_int 0)))
(clobber (reg:SI 1))])]
""
"")
;; Call a looping block move library function (e.g. __movstrSI64n68).
;; Call an SImode looping block move library function (e.g. __movstrSI64n68).
;; operands 0-5 as in the non-looping interface
;; operand 6 is the loop count
(define_expand "call_block_move_loop"
(define_expand "call_movstrsi_loop"
[(set (reg:SI 3) (minus:SI (match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "immediate_operand" "")))
(set (match_operand:SI 5 "register_operand" "")
......@@ -1789,8 +1790,9 @@
(use (reg:SI 3))
(use (match_dup 5))
(use (reg:SI 6))
(parallel [(call (mem:SI (match_operand 0 "" ""))
(const_int 0))
(parallel [(set (reg:DI 2)
(call (mem:SI (match_operand 0 "" ""))
(const_int 0)))
(clobber (reg:SI 1))])]
""
"")
......@@ -1816,7 +1818,7 @@
"@
mask %0,%1,0xffff
or %0,%#r0,%h1
ld.hu %0,%1"
%V1ld.hu %0,%1"
[(set_attr "type" "arith,arith,load")])
(define_expand "zero_extendqihi2"
......@@ -1838,7 +1840,7 @@
"@
mask %0,%1,0xff
or %0,%#r0,%q1
ld.bu %0,%1"
%V1ld.bu %0,%1"
[(set_attr "type" "arith,arith,load")])
(define_expand "zero_extendqisi2"
......@@ -1865,7 +1867,7 @@
"@
mask %0,%1,0xff
or %0,%#r0,%q1
ld.bu %0,%1"
%V1ld.bu %0,%1"
[(set_attr "type" "arith,arith,load")])
;;- sign extension instructions
......@@ -1899,7 +1901,7 @@
ext %0,%1,16<0>
or %0,%#r0,%h1
subu %0,%#r0,%H1
ld.h %0,%1"
%V1ld.h %0,%1"
[(set_attr "type" "bit,arith,arith,load")])
(define_expand "extendqihi2"
......@@ -1922,7 +1924,7 @@
ext %0,%1,8<0>
or %0,%#r0,%q1
subu %0,%#r0,%Q1
ld.b %0,%1"
%V1ld.b %0,%1"
[(set_attr "type" "bit,arith,arith,load")])
(define_expand "extendqisi2"
......@@ -1945,7 +1947,7 @@
ext %0,%1,8<0>
or %0,%#r0,%q1
subu %0,%#r0,%Q1
ld.b %0,%1"
%V1ld.b %0,%1"
[(set_attr "type" "bit,arith,arith,load")])
;; Conversions between float and double.
......@@ -3016,7 +3018,7 @@
(ashiftrt:SI (match_operand:SI 1 "memory_operand" "m")
(const_int 24)))]
"! SCALED_ADDRESS_P (XEXP (operands[1], 0))"
"ld.b %0,%1"
"%V1ld.b %0,%1"
[(set_attr "type" "load")])
(define_insn ""
......@@ -3024,7 +3026,7 @@
(lshiftrt:SI (match_operand:SI 1 "memory_operand" "m")
(const_int 24)))]
"! SCALED_ADDRESS_P (XEXP (operands[1], 0))"
"ld.bu %0,%1"
"%V1ld.bu %0,%1"
[(set_attr "type" "load")])
(define_insn ""
......@@ -3032,7 +3034,7 @@
(ashiftrt:SI (match_operand:SI 1 "memory_operand" "m")
(const_int 16)))]
"! SCALED_ADDRESS_P (XEXP (operands[1], 0))"
"ld.h %0,%1"
"%V1ld.h %0,%1"
[(set_attr "type" "load")])
(define_insn ""
......@@ -3040,7 +3042,7 @@
(lshiftrt:SI (match_operand:SI 1 "memory_operand" "m")
(const_int 16)))]
"! SCALED_ADDRESS_P (XEXP (operands[1], 0))"
"ld.hu %0,%1"
"%V1ld.hu %0,%1"
[(set_attr "type" "load")])
;;- arithmetic shift instructions.
......
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