Commit a591e1d1 by Alan Lawrence Committed by Alan Lawrence

[AArch64 Doc] Clarify feature modifiers {no,}{fp,simd,crypto}

gcc:

	* doc/invoke.texi: Clarify AArch64 feature modifiers (no)fp, (no)simd
	and (no)crypto.

From-SVN: r224909
parent 261fb553
2015-06-24 Alan Lawrence <alan.lawrence@arm.com> 2015-06-24 Alan Lawrence <alan.lawrence@arm.com>
* doc/invoke.texi: Clarify AArch64 feature modifiers (no)fp, (no)simd
and (no)crypto.
2015-06-24 Alan Lawrence <alan.lawrence@arm.com>
* config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsimd): New. * config/aarch64/aarch64-protos.h (aarch64_err_no_fpadvsimd): New.
* config/aarch64/aarch64.md (mov<mode>/GPF, movtf): Use * config/aarch64/aarch64.md (mov<mode>/GPF, movtf): Use
......
...@@ -12359,7 +12359,10 @@ Generate big-endian code. This is the default when GCC is configured for an ...@@ -12359,7 +12359,10 @@ Generate big-endian code. This is the default when GCC is configured for an
@item -mgeneral-regs-only @item -mgeneral-regs-only
@opindex mgeneral-regs-only @opindex mgeneral-regs-only
Generate code which uses only the general registers. Generate code which uses only the general-purpose registers. This is equivalent
to feature modifier @option{nofp} of @option{-march} or @option{-mcpu}, except
that @option{-mgeneral-regs-only} takes precedence over any conflicting feature
modifier regardless of sequence.
@item -mlittle-endian @item -mlittle-endian
@opindex mlittle-endian @opindex mlittle-endian
...@@ -12498,20 +12501,22 @@ over the appropriate part of this option. ...@@ -12498,20 +12501,22 @@ over the appropriate part of this option.
@subsubsection @option{-march} and @option{-mcpu} Feature Modifiers @subsubsection @option{-march} and @option{-mcpu} Feature Modifiers
@cindex @option{-march} feature modifiers @cindex @option{-march} feature modifiers
@cindex @option{-mcpu} feature modifiers @cindex @option{-mcpu} feature modifiers
Feature modifiers used with @option{-march} and @option{-mcpu} can be one Feature modifiers used with @option{-march} and @option{-mcpu} can be any of
the following: the following and their inverses @option{no@var{feature}}:
@table @samp @table @samp
@item crc @item crc
Enable CRC extension. Enable CRC extension.
@item crypto @item crypto
Enable Crypto extension. This implies Advanced SIMD is enabled. Enable Crypto extension. This also enables Advanced SIMD and floating-point
instructions.
@item fp @item fp
Enable floating-point instructions. Enable floating-point instructions. This is on by default for all possible
values for options @option{-march} and @option{-mcpu}.
@item simd @item simd
Enable Advanced SIMD instructions. This implies floating-point instructions Enable Advanced SIMD instructions. This also enables floating-point
are enabled. This is the default for all current possible values for options instructions. This is on by default for all possible values for options
@option{-march} and @option{-mcpu=}. @option{-march} and @option{-mcpu}.
@item lse @item lse
Enable Large System Extension instructions. Enable Large System Extension instructions.
@item pan @item pan
...@@ -12522,6 +12527,10 @@ Enable Limited Ordering Regions support. ...@@ -12522,6 +12527,10 @@ Enable Limited Ordering Regions support.
Enable ARMv8.1 Advanced SIMD instructions. Enable ARMv8.1 Advanced SIMD instructions.
@end table @end table
That is, @option{crypto} implies @option{simd} implies @option{fp}.
Conversely, @option{nofp} (or equivalently, @option{-mgeneral-regs-only})
implies @option{nosimd} implies @option{nocrypto}.
@node Adapteva Epiphany Options @node Adapteva Epiphany Options
@subsection Adapteva Epiphany Options @subsection Adapteva Epiphany Options
......
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