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lvzhengyang
riscv-gcc-1
Commits
a5617632
Commit
a5617632
authored
Oct 06, 2009
by
Ben Elliston
Committed by
Ben Elliston
Oct 07, 2009
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* config/rs6000/a2.md: Remove duplicated lines.
From-SVN: r152501
parent
37a7519a
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gcc/ChangeLog
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gcc/config/rs6000/a2.md
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gcc/ChangeLog
View file @
a5617632
2009
-
10
-
07
Ben
Elliston
<
bje
@
au
.
ibm
.
com
>
2009
-
10
-
07
Ben
Elliston
<
bje
@
au
.
ibm
.
com
>
*
config
/
rs6000
/
a2
.
md
:
Remove
duplicated
lines
.
2009
-
10
-
07
Ben
Elliston
<
bje
@
au
.
ibm
.
com
>
*
config
.
gcc
(
powerpc
*-*-*):
Handle
a2
.
*
config
.
gcc
(
powerpc
*-*-*):
Handle
a2
.
*
config
/
rs6000
/
rs6000
.
md
(
cpu
):
Add
ppca2
.
Include
"a2.md"
.
*
config
/
rs6000
/
rs6000
.
md
(
cpu
):
Add
ppca2
.
Include
"a2.md"
.
*
config
/
rs6000
/
a2
.
md
:
New
file
.
*
config
/
rs6000
/
a2
.
md
:
New
file
.
gcc/config/rs6000/a2.md
View file @
a5617632
...
@@ -117,122 +117,3 @@
...
@@ -117,122 +117,3 @@
(and (eq_attr "type" "ssqrt")
(and (eq_attr "type" "ssqrt")
(eq_attr "cpu" "ppca2"))
(eq_attr "cpu" "ppca2"))
"axu")
"axu")
;; Scheduling description for PowerPC A2 processors.
;; Copyright (C) 2008 Free Software Foundation, Inc.
;;
;; Contributed by Ben Elliston (bje@au.ibm.com).
(define_automaton "a2")
;; CPU units
;; The multiplier pipeline.
(define_cpu_unit "mult" "a2")
;; The auxillary processor unit (FP/vector unit).
(define_cpu_unit "axu" "a2")
;; D.4.6
;; Some peculiarities for certain SPRs
(define_insn_reservation "ppca2-mfcr" 1
(and (eq_attr "type" "mfcr")
(eq_attr "cpu" "ppca2"))
"nothing")
(define_insn_reservation "ppca2-mfjmpr" 5
(and (eq_attr "type" "mfjmpr")
(eq_attr "cpu" "ppca2"))
"nothing")
(define_insn_reservation "ppca2-mtjmpr" 5
(and (eq_attr "type" "mtjmpr")
(eq_attr "cpu" "ppca2"))
"nothing")
;; D.4.8
(define_insn_reservation "ppca2-imul" 1
(and (eq_attr "type" "imul,imul2,imul3,imul_compare")
(eq_attr "cpu" "ppca2"))
"nothing")
;; FIXME: latency and multiplier reservation for 64-bit multiply?
(define_insn_reservation "ppca2-lmul" 6
(and (eq_attr "type" "lmul,lmul_compare")
(eq_attr "cpu" "ppca2"))
"mult
*
3")
;; D.4.9
(define_insn_reservation "ppca2-idiv" 32
(and (eq_attr "type" "idiv")
(eq_attr "cpu" "ppca2"))
"mult
*
32")
(define_insn_reservation "ppca2-ldiv" 65
(and (eq_attr "type" "ldiv")
(eq_attr "cpu" "ppca2"))
"mult
*
65")
;; D.4.13
(define_insn_reservation "pcca2-load" 5
(and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u")
(eq_attr "cpu" "ppca2"))
"nothing")
;; D.8.1
(define_insn_reservation "ppca2-fp" 6
(and (eq_attr "type" "fp") ;; Ignore fpsimple insn types (SPE only).
(eq_attr "cpu" "ppca2"))
"axu")
;; D.8.4
(define_insn_reservation "ppca2-fp-load" 6
(and (eq_attr "type" "fpload,fpload_u,fpload_ux")
(eq_attr "cpu" "ppca2"))
"axu")
;; D.8.5
(define_insn_reservation "ppca2-fp-store" 2
(and (eq_attr "type" "fpstore,fpstore_u,fpstore_ux")
(eq_attr "cpu" "ppca2"))
"axu")
;; D.8.6
(define_insn_reservation "ppca2-fpcompare" 5
(and (eq_attr "type" "fpcompare")
(eq_attr "cpu" "ppca2"))
"axu")
;; D.8.7
;;
;; Instructions from the same thread succeeding the floating-point
;; divide cannot be executed until the floating-point divide has
;; completed. Since there is nothing else we can do, this thread will
;; just have to stall.
(define_insn_reservation "ppca2-ddiv" 72
(and (eq_attr "type" "ddiv")
(eq_attr "cpu" "ppca2"))
"axu")
(define_insn_reservation "ppca2-sdiv" 59
(and (eq_attr "type" "sdiv")
(eq_attr "cpu" "ppca2"))
"axu")
;; D.8.8
;;
;; Instructions from the same thread succeeding the floating-point
;; divide cannot be executed until the floating-point divide has
;; completed. Since there is nothing else we can do, this thread will
;; just have to stall.
(define_insn_reservation "ppca2-dsqrt" 69
(and (eq_attr "type" "dsqrt")
(eq_attr "cpu" "ppca2"))
"axu")
(define_insn_reservation "ppca2-ssqrt" 65
(and (eq_attr "type" "ssqrt")
(eq_attr "cpu" "ppca2"))
"axu")
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