Commit a4d47cac by Eric Botcazou Committed by Eric Botcazou

re PR debug/59418 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2221)

	PR debug/59418
	* dwarf2cfi.c (dwarf2out_frame_debug_cfa_offset): Fix comment and tidy.
	(dwarf2out_frame_debug_cfa_restore): Handle TARGET_DWARF_REGISTER_SPAN.
	(dwarf2out_frame_debug_expr): Tidy.

From-SVN: r206084
parent 468f5fc9
2013-12-18 Eric Botcazou <ebotcazou@adacore.com>
PR debug/59418
* dwarf2cfi.c (dwarf2out_frame_debug_cfa_offset): Fix comment and tidy.
(dwarf2out_frame_debug_cfa_restore): Handle TARGET_DWARF_REGISTER_SPAN.
(dwarf2out_frame_debug_expr): Tidy.
2013-12-18 Alexander Ivchenko <alexander.ivchenko@intel.com> 2013-12-18 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com> Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Sergey Lega <sergey.s.lega@intel.com> Sergey Lega <sergey.s.lega@intel.com>
...@@ -1149,18 +1149,15 @@ dwarf2out_frame_debug_cfa_offset (rtx set) ...@@ -1149,18 +1149,15 @@ dwarf2out_frame_debug_cfa_offset (rtx set)
else else
{ {
/* We have a PARALLEL describing where the contents of SRC live. /* We have a PARALLEL describing where the contents of SRC live.
Queue register saves for each piece of the PARALLEL. */ Adjust the offset for each piece of the PARALLEL. */
int par_index;
int limit;
HOST_WIDE_INT span_offset = offset; HOST_WIDE_INT span_offset = offset;
gcc_assert (GET_CODE (span) == PARALLEL); gcc_assert (GET_CODE (span) == PARALLEL);
limit = XVECLEN (span, 0); const int par_len = XVECLEN (span, 0);
for (par_index = 0; par_index < limit; par_index++) for (int par_index = 0; par_index < par_len; par_index++)
{ {
rtx elem = XVECEXP (span, 0, par_index); rtx elem = XVECEXP (span, 0, par_index);
sregno = dwf_regno (src); sregno = dwf_regno (src);
reg_save (sregno, INVALID_REGNUM, span_offset); reg_save (sregno, INVALID_REGNUM, span_offset);
span_offset += GET_MODE_SIZE (GET_MODE (elem)); span_offset += GET_MODE_SIZE (GET_MODE (elem));
...@@ -1229,10 +1226,31 @@ dwarf2out_frame_debug_cfa_expression (rtx set) ...@@ -1229,10 +1226,31 @@ dwarf2out_frame_debug_cfa_expression (rtx set)
static void static void
dwarf2out_frame_debug_cfa_restore (rtx reg) dwarf2out_frame_debug_cfa_restore (rtx reg)
{ {
unsigned int regno = dwf_regno (reg); gcc_assert (REG_P (reg));
rtx span = targetm.dwarf_register_span (reg);
if (!span)
{
unsigned int regno = dwf_regno (reg);
add_cfi_restore (regno);
update_row_reg_save (cur_row, regno, NULL);
}
else
{
/* We have a PARALLEL describing where the contents of REG live.
Restore the register for each piece of the PARALLEL. */
gcc_assert (GET_CODE (span) == PARALLEL);
add_cfi_restore (regno); const int par_len = XVECLEN (span, 0);
update_row_reg_save (cur_row, regno, NULL); for (int par_index = 0; par_index < par_len; par_index++)
{
reg = XVECEXP (span, 0, par_index);
gcc_assert (REG_P (reg));
unsigned int regno = dwf_regno (reg);
add_cfi_restore (regno);
update_row_reg_save (cur_row, regno, NULL);
}
}
} }
/* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE. /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
...@@ -1884,23 +1902,23 @@ dwarf2out_frame_debug_expr (rtx expr) ...@@ -1884,23 +1902,23 @@ dwarf2out_frame_debug_expr (rtx expr)
} }
} }
span = NULL;
if (REG_P (src)) if (REG_P (src))
span = targetm.dwarf_register_span (src); span = targetm.dwarf_register_span (src);
else
span = NULL;
if (!span) if (!span)
queue_reg_save (src, NULL_RTX, offset); queue_reg_save (src, NULL_RTX, offset);
else else
{ {
/* We have a PARALLEL describing where the contents of SRC live. /* We have a PARALLEL describing where the contents of SRC live.
Queue register saves for each piece of the PARALLEL. */ Queue register saves for each piece of the PARALLEL. */
int par_index;
int limit;
HOST_WIDE_INT span_offset = offset; HOST_WIDE_INT span_offset = offset;
gcc_assert (GET_CODE (span) == PARALLEL); gcc_assert (GET_CODE (span) == PARALLEL);
limit = XVECLEN (span, 0); const int par_len = XVECLEN (span, 0);
for (par_index = 0; par_index < limit; par_index++) for (int par_index = 0; par_index < par_len; par_index++)
{ {
rtx elem = XVECEXP (span, 0, par_index); rtx elem = XVECEXP (span, 0, par_index);
queue_reg_save (elem, NULL_RTX, span_offset); queue_reg_save (elem, NULL_RTX, span_offset);
......
2013-12-18 Eric Botcazou <ebotcazou@adacore.com>
* gcc.dg/pr59418.c: New test.
2013-12-17 Jakub Jelinek <jakub@redhat.com> 2013-12-17 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/59523 PR tree-optimization/59523
......
/* PR debug/59418 */
/* Reported by Ryan Mansfield <rmansfield@qnx.com> */
/* { dg-do compile } */
/* { dg-options "-Os -g" } */
/* { dg-options "-march=armv7-a -mfloat-abi=hard -Os -g" { target arm*-*-* } } */
extern int printf (const char *__format, ...);
void
foo (const char *pptr, int caplen)
{
int type;
const char *tptr;
if (caplen < 4)
{
(void) printf ("foo");
return;
}
while (tptr < pptr)
{
switch (type)
{
case 0x01:
printf ("");
case 0x0b:
printf ("");
case 0x0e:
printf ("");
case 0x10:
printf ("%1.2fW", bar (tptr, caplen) / 1000.0);
}
}
printf ("foo");
}
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