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lvzhengyang
riscv-gcc-1
Commits
a4944851
Commit
a4944851
authored
Sep 21, 2015
by
Ulrich Weigand
Committed by
Ulrich Weigand
Sep 21, 2015
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* config/spu/spu.c (spu_expand_insv): Avoid undefined behavior.
From-SVN: r227974
parent
b1e251ec
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gcc/ChangeLog
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gcc/config/spu/spu.c
+5
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gcc/ChangeLog
View file @
a4944851
2015
-
09
-
21
Ulrich
Weigand
<
Ulrich
.
Weigand
@
de
.
ibm
.
com
>
*
config
/
spu
/
spu
.
c
(
spu_expand_insv
):
Avoid
undefined
behavior
.
2015
-
09
-
21
Richard
Biener
<
rguenther
@
suse
.
de
>
*
passes
.
c
(
rest_of_decl_compilation
):
Do
not
call
gcc/config/spu/spu.c
View file @
a4944851
...
...
@@ -472,7 +472,7 @@ spu_expand_insv (rtx ops[])
{
HOST_WIDE_INT
width
=
INTVAL
(
ops
[
1
]);
HOST_WIDE_INT
start
=
INTVAL
(
ops
[
2
]);
HOST_WIDE_INT
maskbits
;
unsigned
HOST_WIDE_INT
maskbits
;
machine_mode
dst_mode
;
rtx
dst
=
ops
[
0
],
src
=
ops
[
3
];
int
dst_size
;
...
...
@@ -527,15 +527,15 @@ spu_expand_insv (rtx ops[])
switch
(
dst_size
)
{
case
32
:
maskbits
=
(
-
1ll
<<
(
32
-
width
-
start
));
maskbits
=
(
~
(
unsigned
HOST_WIDE_INT
)
0
<<
(
32
-
width
-
start
));
if
(
start
)
maskbits
+=
(
1ll
<<
(
32
-
start
));
maskbits
+=
(
(
unsigned
HOST_WIDE_INT
)
1
<<
(
32
-
start
));
emit_move_insn
(
mask
,
GEN_INT
(
maskbits
));
break
;
case
64
:
maskbits
=
(
-
1ll
<<
(
64
-
width
-
start
));
maskbits
=
(
~
(
unsigned
HOST_WIDE_INT
)
0
<<
(
64
-
width
-
start
));
if
(
start
)
maskbits
+=
(
1ll
<<
(
64
-
start
));
maskbits
+=
(
(
unsigned
HOST_WIDE_INT
)
1
<<
(
64
-
start
));
emit_move_insn
(
mask
,
GEN_INT
(
maskbits
));
break
;
case
128
:
...
...
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