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Commit a466bea3 by Kazu Hirata Committed by Kazu Hirata
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h8300-protos.h: Add a prototype for h8300_regs_ok_for_stm. 

	* config/h8300/h8300-protos.h: Add a prototype for
	h8300_regs_ok_for_stm.
	* config/h8300/h8300.c (h8300_regs_ok_for_stm): New.
	* config/h8300/h8300.md (stm_h8300s_2_advanced,
	stm_h8300s_2_normal, stm_h8300s_2, stm_h8300s_3_advanced,
	stm_h8300s_3_normal, stm_h8300s_3, stm_h8300s_4_advanced,
	stm_h8300s_4_normal, stm_h8300s_4, ldm_h8300s_2_advanced,
	ldm_h8300s_2_normal, ldm_h8300s_2, ldm_h8300s_3_advanced,
	ldm_h8300s_3_normal, ldm_h8300s_3, ldm_h8300s_4_advanced,
	ldm_h8300s_4_normal, ldm_h8300s_4): Use
	h8300_regs_ok_for_stm().

From-SVN: r77624
parent cf81c88e
Showing with 64 additions and 78 deletions
gcc/ChangeLog
2004-02-10 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300-protos.h: Add a prototype for
h8300_regs_ok_for_stm.
* config/h8300/h8300.c (h8300_regs_ok_for_stm): New.
* config/h8300/h8300.md (stm_h8300s_2_advanced,
stm_h8300s_2_normal, stm_h8300s_2, stm_h8300s_3_advanced,
stm_h8300s_3_normal, stm_h8300s_3, stm_h8300s_4_advanced,
stm_h8300s_4_normal, stm_h8300s_4, ldm_h8300s_2_advanced,
ldm_h8300s_2_normal, ldm_h8300s_2, ldm_h8300s_3_advanced,
ldm_h8300s_3_normal, ldm_h8300s_3, ldm_h8300s_4_advanced,
ldm_h8300s_4_normal, ldm_h8300s_4): Use
h8300_regs_ok_for_stm().
2004-02-10 Danny Smith <dannysmith@users.sourceforge.net>
PR c/14088
......
gcc/config/h8300/h8300-protos.h
......@@ -102,6 +102,7 @@ extern void h8300_expand_prologue (void);
extern void h8300_expand_epilogue (void);
extern int h8300_current_function_interrupt_function_p (void);
extern int h8300_initial_elimination_offset (int, int);
extern int h8300_regs_ok_for_stm (int, rtx[]);
extern int h8300_hard_regno_rename_ok (unsigned int, unsigned int);
struct cpp_reader;
......
gcc/config/h8300/h8300.c
......@@ -4576,6 +4576,37 @@ same_cmp_following_p (rtx i1)
&& any_condjump_p (i2) && onlyjump_p (i2));
}
/* Return nonzero if OPERANDS are valid for stm (or ldm) that pushes
(or pops) N registers. OPERANDS are asssumed to be an array of
registers. */
int
h8300_regs_ok_for_stm (int n, rtx operands[])
{
switch (n)
{
case 2:
return ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
|| (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
|| (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5));
case 3:
return ((REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2)
|| (REGNO (operands[0]) == 4
&& REGNO (operands[1]) == 5
&& REGNO (operands[2]) == 6));
case 4:
return (REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2
&& REGNO (operands[3]) == 3);
}
abort ();
}
/* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
int
......
gcc/config/h8300/h8300.md
......@@ -1911,9 +1911,7 @@
(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -8)))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
|| (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
|| (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
&& h8300_regs_ok_for_stm (2, operands)"
"stm.l\\t%S0-%S1,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -1927,9 +1925,7 @@
(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -8)))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
|| (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
|| (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
&& h8300_regs_ok_for_stm (2, operands)"
"stm.l\\t%S0-%S1,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -1938,9 +1934,7 @@
[(match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" "")]
"TARGET_H8300S
&& ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
|| (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
|| (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
&& h8300_regs_ok_for_stm (2, operands)"
"
{
if (!TARGET_NORMAL_MODE)
......@@ -1961,12 +1955,7 @@
(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -12)))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2)
|| (REGNO (operands[0]) == 4
&& REGNO (operands[1]) == 5
&& REGNO (operands[2]) == 6))"
&& h8300_regs_ok_for_stm (3, operands)"
"stm.l\\t%S0-%S2,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -1982,12 +1971,7 @@
(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -12)))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2)
|| (REGNO (operands[0]) == 4
&& REGNO (operands[1]) == 5
&& REGNO (operands[2]) == 6))"
&& h8300_regs_ok_for_stm (3, operands)"
"stm.l\\t%S0-%S2,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -1997,12 +1981,7 @@
(match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")]
"TARGET_H8300S
&& ((REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2)
|| (REGNO (operands[0]) == 4
&& REGNO (operands[1]) == 5
&& REGNO (operands[2]) == 6))"
&& h8300_regs_ok_for_stm (3, operands)"
"
{
if (!TARGET_NORMAL_MODE)
......@@ -2027,10 +2006,7 @@
(set (mem:SI (plus:SI (reg:SI SP_REG) (const_int -16)))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2
&& REGNO (operands[3]) == 3"
&& h8300_regs_ok_for_stm (4, operands)"
"stm.l\\t%S0-%S3,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2048,10 +2024,7 @@
(set (mem:SI (plus:HI (reg:HI SP_REG) (const_int -16)))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
&& REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2
&& REGNO (operands[3]) == 3"
&& h8300_regs_ok_for_stm (4, operands)"
"stm.l\\t%S0-%S3,@-er7"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2062,10 +2035,7 @@
(match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "register_operand" "")]
"TARGET_H8300S
&& REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2
&& REGNO (operands[3]) == 3"
&& h8300_regs_ok_for_stm (4, operands)"
"
{
if (!TARGET_NORMAL_MODE)
......@@ -2086,9 +2056,7 @@
(set (mem:SI (reg:SI SP_REG))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
|| (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
|| (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
&& h8300_regs_ok_for_stm (2, operands)"
"ldm.l\\t@er7+,%S0-%S1"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2102,9 +2070,7 @@
(set (mem:SI (reg:HI SP_REG))
(match_operand:SI 1 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
|| (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
|| (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
&& h8300_regs_ok_for_stm (2, operands)"
"ldm.l\\t@er7+,%S0-%S1"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2113,9 +2079,7 @@
[(match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "register_operand" "")]
"TARGET_H8300S
&& ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1)
|| (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3)
|| (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))"
&& h8300_regs_ok_for_stm (2, operands)"
"
{
if (!TARGET_NORMAL_MODE)
......@@ -2136,12 +2100,7 @@
(set (mem:SI (reg:SI SP_REG))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2)
|| (REGNO (operands[0]) == 4
&& REGNO (operands[1]) == 5
&& REGNO (operands[2]) == 6))"
&& h8300_regs_ok_for_stm (3, operands)"
"ldm.l\\t@er7+,%S0-%S2"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2157,12 +2116,7 @@
(set (mem:SI (reg:HI SP_REG))
(match_operand:SI 2 "register_operand" ""))])]
"TARGET_H8300S && TARGET_NORMAL_MODE
&& ((REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2)
|| (REGNO (operands[0]) == 4
&& REGNO (operands[1]) == 5
&& REGNO (operands[2]) == 6))"
&& h8300_regs_ok_for_stm (3, operands)"
"ldm.l\\t@er7+,%S0-%S2"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2172,12 +2126,7 @@
(match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")]
"TARGET_H8300S
&& ((REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2)
|| (REGNO (operands[0]) == 4
&& REGNO (operands[1]) == 5
&& REGNO (operands[2]) == 6))"
&& h8300_regs_ok_for_stm (3, operands)"
"
{
if (!TARGET_NORMAL_MODE)
......@@ -2202,10 +2151,7 @@
(set (mem:SI (reg:SI SP_REG))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2
&& REGNO (operands[3]) == 3"
&& h8300_regs_ok_for_stm (4, operands)"
"ldm.l\\t@er7+,%S0-%S3"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2223,10 +2169,7 @@
(set (mem:SI (reg:HI SP_REG))
(match_operand:SI 3 "register_operand" ""))])]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2
&& REGNO (operands[3]) == 3"
&& h8300_regs_ok_for_stm (4, operands)"
"ldm.l\\t@er7+,%S0-%S3"
[(set_attr "cc" "none")
(set_attr "length" "4")])
......@@ -2237,10 +2180,7 @@
(match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "register_operand" "")]
"TARGET_H8300S && !TARGET_NORMAL_MODE
&& REGNO (operands[0]) == 0
&& REGNO (operands[1]) == 1
&& REGNO (operands[2]) == 2
&& REGNO (operands[3]) == 3"
&& h8300_regs_ok_for_stm (4, operands)"
"
{
if (!TARGET_NORMAL_MODE)
......
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