2010-xx-xx Mingjie Xing <mingjie.xing@gmail.com>

gcc/
2010-xx-xx  Mingjie Xing  <mingjie.xing@gmail.com>

	* config/mips/mips.c (CODE_FOR_loongson_pmullh): Define.
	* config/mips/loongson.md (UNSPEC_LOONGSON_PMULL): Delete.
	(loongson_pmull<V_suffix>): Rename to...
	(mul<mode>3): ...this and use MULT instead of an UNSPEC.

From-SVN: r163246

gcc/ChangeLog

+2010-08-14  Mingjie Xing  <mingjie.xing@gmail.com>
+
+	* config/mips/mips.c (CODE_FOR_loongson_pmullh): Define.
+	* config/mips/loongson.md (UNSPEC_LOONGSON_PMULL): Delete.
+	(loongson_pmull<V_suffix>): Rename to...
+	(mul<mode>3): ...this and use MULT instead of an UNSPEC.
+
 2010-08-13  Jack Howarth <howarth@bromo.med.uc.edu>
 
 	* gcc/configure.ac: Enable -fomit-frame-pointer on darwin

gcc/config/mips/loongson.md

@@ -31,7 +31,6 @@
   UNSPEC_LOONGSON_PMOVMSK
   UNSPEC_LOONGSON_PMULHU
   UNSPEC_LOONGSON_PMULH
-  UNSPEC_LOONGSON_PMULL
   UNSPEC_LOONGSON_PMULU
   UNSPEC_LOONGSON_PASUBUB
   UNSPEC_LOONGSON_BIADD
@@ -353,11 +352,10 @@
   [(set_attr "type" "fmul")])
 
 ;; Multiply signed integers and store low result.
-(define_insn "loongson_pmull<V_suffix>"
+(define_insn "mul<mode>3"
   [(set (match_operand:VH 0 "register_operand" "=f")
-        (unspec:VH [(match_operand:VH 1 "register_operand" "f")
-		    (match_operand:VH 2 "register_operand" "f")]
-		   UNSPEC_LOONGSON_PMULL))]
+        (mult:VH (match_operand:VH 1 "register_operand" "f")
+                 (match_operand:VH 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "pmull<V_suffix>\t%0,%1,%2"
   [(set_attr "type" "fmul")])

gcc/config/mips/mips.c

@@ -12684,6 +12684,7 @@ AVAIL_NON_MIPS16 (cache, TARGET_CACHE_BUILTIN)
 #define CODE_FOR_loongson_pminub CODE_FOR_uminv8qi3
 #define CODE_FOR_loongson_pmulhuh CODE_FOR_umulv4hi3_highpart
 #define CODE_FOR_loongson_pmulhh CODE_FOR_smulv4hi3_highpart
+#define CODE_FOR_loongson_pmullh CODE_FOR_mulv4hi3
 #define CODE_FOR_loongson_psubw CODE_FOR_subv2si3
 #define CODE_FOR_loongson_psubh CODE_FOR_subv4hi3
 #define CODE_FOR_loongson_psubb CODE_FOR_subv8qi3