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riscv-gcc-1
Commit a4235495 by Uros Bizjak
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* ChangeLog: Fix description of my last commit. 

From-SVN: r176566
parent 7c53a140
Showing with 4 additions and 6 deletions
gcc/ChangeLog
2011-07-21 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_decompose_address): Reject all but
register operands and DImode hard registers in index.
register operands and subregs of DImode hard registers in index.
2011-07-21 Kai Tietz <ktietz@redhat.com>
......@@ -51,9 +51,8 @@
* config/i386/i386.md (indirect_jump): Replace
nonimmediate_operand with indirect_branch_operand.
(*indirect_jump): Likewise. Replace constraint "m" with "w".
(tablejump): Replace nonimmediate_operand with
indirect_branch_operand. Convert operand 0 to Pmode for x32 if
not PIC.
(tablejump): Replace nonimmediate_operand with indirect_branch_operand.
Convert operand 0 to Pmode for x32 if not PIC.
(*tablejump_1): Replace nonimmediate_operand with
indirect_branch_operand. Replace constraint "m" with "w".
(*call_vzeroupper): Replace constraint "m" with "w".
......@@ -64,8 +63,7 @@
(*call_value): Likewise.
(*call_value_rex64_ms_sysv_vzeroupper): Likewise.
(*call_value_rex64_ms_sysv): Likewise.
(set_got_offset_rex64): Check TARGET_LP64 instead of
TARGET_64BIT.
(set_got_offset_rex64): Check TARGET_LP64 instead of TARGET_64BIT.
* config/i386/predicates.md (indirect_branch_operand): New.
(call_insn_operand): Support x32.
......
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