rs6000.md (extenddf<mode>2_fprs): Make this a parameterized name.

@extenddf<mode>2_{fprs,vsx}


	* config/rs6000/rs6000.md (extenddf<mode>2_fprs): Make this a
	parameterized name.
	(extenddf<mode>2_vsx): Make this a parameterized name.
	(extenddf<mode>2): Use those names.  Simplify.

From-SVN: r272901

gcc/ChangeLog

 2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
 
+	* config/rs6000/rs6000.md (extenddf<mode>2_fprs): Make this a
+	parameterized name.
+	(extenddf<mode>2_vsx): Make this a parameterized name.
+	(extenddf<mode>2): Use those names.  Simplify.
+
+2019-07-01  Segher Boessenkool  <segher@kernel.crashing.org>
+
 	* config/rs6000/rs6000.md (eh_set_lr_<mode>): Make this a parameterized
 	name.
 	(eh_return): Use that name.  Simplify.

gcc/config/rs6000/rs6000.md

@@ -7789,31 +7789,20 @@
   if (FLOAT128_IEEE_P (<MODE>mode))
     rs6000_expand_float128_convert (operands[0], operands[1], false);
   else if (TARGET_VSX)
-    {
-      if (<MODE>mode == TFmode)
-	emit_insn (gen_extenddftf2_vsx (operands[0], operands[1]));
-      else if (<MODE>mode == IFmode)
-	emit_insn (gen_extenddfif2_vsx (operands[0], operands[1]));
-      else
-	gcc_unreachable ();
-    }
-   else
+    emit_insn (gen_extenddf2_vsx (<MODE>mode, operands[0], operands[1]));
+  else
     {
       rtx zero = gen_reg_rtx (DFmode);
       rs6000_emit_move (zero, CONST0_RTX (DFmode), DFmode);
 
-      if (<MODE>mode == TFmode)
-	emit_insn (gen_extenddftf2_fprs (operands[0], operands[1], zero));
-      else if (<MODE>mode == IFmode)
-	emit_insn (gen_extenddfif2_fprs (operands[0], operands[1], zero));
-      else
-	gcc_unreachable ();
+      emit_insn (gen_extenddf2_fprs (<MODE>mode,
+				     operands[0], operands[1], zero));
     }
   DONE;
 })
 
 ;; Allow memory operands for the source to be created by the combiner.
-(define_insn_and_split "extenddf<mode>2_fprs"
+(define_insn_and_split "@extenddf<mode>2_fprs"
   [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d,&d")
 	(float_extend:IBM128
 	 (match_operand:DF 1 "nonimmediate_operand" "d,m,d")))
@@ -7832,7 +7821,7 @@
   operands[4] = simplify_gen_subreg (DFmode, operands[0], <MODE>mode, lo_word);
 })
 
-(define_insn_and_split "extenddf<mode>2_vsx"
+(define_insn_and_split "@extenddf<mode>2_vsx"
   [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d")
 	(float_extend:IBM128
 	 (match_operand:DF 1 "nonimmediate_operand" "wa,m")))]