Correct imul (r64) latency for modern Intel CPUs
Since Sandybridge the 64bit multiplication latency is three cycles, not four. So update the costs to reflect reality. * x86-tune-costs.h (skylake_cost, core_cost): Decrease r64 multiply latencies. * gcc.target/i386/wmul-3.c: New test. From-SVN: r255760
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gcc/testsuite/gcc.target/i386/wmul-3.c
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