Commit a278aa17 by Uros Bizjak Committed by Uros Bizjak

tree-vect.h (check_vect): Handle AVX2, remove XOP handling.

	* gcc.dg/vect/tree-vect.h (check_vect): Handle AVX2,
	remove XOP handling.

From-SVN: r236216
parent 6b6435ca
2016-05-13 Uros Bizjak <ubizjak@gmail.com>
* gcc.dg/vect/tree-vect.h (check_vect): Handle AVX2,
remove XOP handling.
2016-05-13 Nathan Sidwell <nathan@acm.org> 2016-05-13 Nathan Sidwell <nathan@acm.org>
* gcc.dg/atomic-noinline-aux.c: Include stddef.h. Fix * gcc.dg/atomic-noinline-aux.c: Include stddef.h. Fix
......
...@@ -32,25 +32,26 @@ check_vect (void) ...@@ -32,25 +32,26 @@ check_vect (void)
asm volatile (".long 0x10000484"); asm volatile (".long 0x10000484");
#elif defined(__i386__) || defined(__x86_64__) #elif defined(__i386__) || defined(__x86_64__)
{ {
unsigned int a, b, c, d, want_level, want_c, want_d; unsigned int a, b, c, d,
want_level, want_b = 0, want_c = 0, want_d = 0;
/* Determine what instruction set we've been compiled for, and detect /* Determine what instruction set we've been compiled for, and detect
that we're running with it. This allows us to at least do a compile that we're running with it. This allows us to at least do a compile
check for, e.g. SSE4.1 when the machine only supports SSE2. */ check for, e.g. SSE4.1 when the machine only supports SSE2. */
# ifdef __XOP__ #if defined(__AVX2__)
want_level = 0x80000001, want_c = bit_XOP, want_d = 0; want_level = 7, want_b = bit_AVX2;
# elif defined(__AVX__) # elif defined(__AVX__)
want_level = 1, want_c = bit_AVX, want_d = 0; want_level = 1, want_c = bit_AVX;
# elif defined(__SSE4_1__) # elif defined(__SSE4_1__)
want_level = 1, want_c = bit_SSE4_1, want_d = 0; want_level = 1, want_c = bit_SSE4_1;
# elif defined(__SSSE3__) # elif defined(__SSSE3__)
want_level = 1, want_c = bit_SSSE3, want_d = 0; want_level = 1, want_c = bit_SSSE3;
# else # else
want_level = 1, want_c = 0, want_d = bit_SSE2; want_level = 1, want_d = bit_SSE2;
# endif # endif
if (!__get_cpuid (want_level, &a, &b, &c, &d) if (!__get_cpuid (want_level, &a, &b, &c, &d)
|| ((c & want_c) | (d & want_d)) == 0) || ((b & want_b) | (c & want_c) | (d & want_d)) == 0)
exit (0); exit (0);
} }
#elif defined(__sparc__) #elif defined(__sparc__)
......
/* PR target/61599 */ /* PR target/61599 */
/* { dg-options "-mcmodel=medium -fdata-sections" { target lp64 } } */
/* { dg-additional-sources pr61599-2.c } */
/* { dg-do run { target lp64 } } */ /* { dg-do run { target lp64 } } */
/* { dg-additional-sources pr61599-2.c } */
/* { dg-options "-mcmodel=medium -fdata-sections" } */
char a[1*1024*1024*1024]; char a[1*1024*1024*1024];
char b[1*1024*1024*1024]; char b[1*1024*1024*1024];
......
/* PR target/61599 */ /* PR target/61599 */
/* With -mcmodel=medium, all the arrays will be treated as large data. */
/* { dg-options "-mcmodel=medium -fdata-sections" { target lp64 } } */
/* { dg-do compile { target lp64 } } */ /* { dg-do compile { target lp64 } } */
/* { dg-options "-mcmodel=medium -fdata-sections" { target lp64 } } */
/* With -mcmodel=medium, all the arrays will be treated as large data. */
extern char a[]; extern char a[];
extern char b[]; extern char b[];
......
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