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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
a273c72a
Commit
a273c72a
authored
Nov 14, 2007
by
Michael Meissner
Committed by
Michael Meissner
Nov 14, 2007
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make ix86_sse5_valid_op_p adhere to GNU coding style
From-SVN: r130163
parent
6eb065e6
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gcc/ChangeLog
+5
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gcc/config/i386/i386.c
+2
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gcc/ChangeLog
View file @
a273c72a
2007
-
11
-
13
Michael
Meissner
<
michael
.
meissner
@
amd
.
com
>
*
config
/
i386
/
i386
.
c
(
ix86_sse5_valid_op_p
):
Put
type
on
separate
line
.
2007
-
11
-
13
Sterling
Augustine
<
sterling
@
tensilica
.
com
>
2007
-
11
-
13
Sterling
Augustine
<
sterling
@
tensilica
.
com
>
Bob
Wilson
<
bob
.
wilson
@
acm
.
org
>
Bob
Wilson
<
bob
.
wilson
@
acm
.
org
>
gcc/config/i386/i386.c
View file @
a273c72a
...
@@ -24856,7 +24856,8 @@ ix86_expand_round (rtx operand0, rtx operand1)
...
@@ -24856,7 +24856,8 @@ ix86_expand_round (rtx operand0, rtx operand1)
NUM is the number of operands.
NUM is the number of operands.
USES_OC0 is true if the instruction uses OC0 and provides 4 variants.
USES_OC0 is true if the instruction uses OC0 and provides 4 variants.
NUM_MEMORY is the maximum number of memory operands to accept. */
NUM_MEMORY is the maximum number of memory operands to accept. */
bool
ix86_sse5_valid_op_p
(
rtx
operands
[],
rtx
insn
,
int
num
,
bool
uses_oc0
,
int
num_memory
)
bool
ix86_sse5_valid_op_p
(
rtx
operands
[],
rtx
insn
,
int
num
,
bool
uses_oc0
,
int
num_memory
)
{
{
int
mem_mask
;
int
mem_mask
;
int
mem_count
;
int
mem_count
;
...
...
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