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Commit a260abc9 by David Edelsohn Committed by David Edelsohn
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tree.c (get_inner_array_type): New function. 

Thu Jun  4 14:35:27 1998  David Edelsohn  <edelsohn@mhpcc.edu>
	* tree.c (get_inner_array_type): New function.
	* tree.h (get_inner_array_type): Prototype.
	* expr.h (STACK_SAVEAREA_MODE): New macro.
	* expr.c (expand_builtin_setjmp): Initialize sa_mode using
	STACK_SAVEAREA_MODE.
	(expand_builtin_longjmp): Likewise.
	* explow.c (emit_stack_save): Likewise.
	(allocate_dynamic_stack_space): Use Pmode not insn_operand_mode.
	* rs6000/aix41.h (ASM_CPU_SPEC): Define relative to ASM_DEFAULT_SPEC.
	(CPP_CPU_SPEC): Define relative to CPU_DEFAULT_SPEC.
	* rs6000/aix43.h: New file.
	* rs6000/t-aix43: New file.
	* rs6000/x-aix41: New file.
	* rs6000/x-aix43: New file.
	* configure.in (rs6000-ibm-aix*): Use them.
	* rs6000/powerpc.h: Delete.
	* rs6000/sysv4.h: Move necessary powerpc.h definitions to here.
	* rs6000/netware.h: and here.
	* rs6000/win-nt.h: and here.
	* rs6000/rs6000.c (processor_target_table, 620): Do not affect
	MASK_POWERPC64.
	(rs6000_override_options): Ignore flag_pic for AIX.
	(rs6000_immed_double_const): Delete.
	(u_short_cint_operand): Don't assume 32-bit CONST_INT.
	(reg_or_u_short_operand): Don't assume 32-bit CONST_INT.
	(num_insns_constant): mask64_operand() is 2 insns.
	(logical_operand): Don't assume 32-bit CONST_INT.
	(non_logical_cint_operand): Don't assume 32-bit CONST_INT.
	(easy_fp_constant): Any CONST_DOUBLE_HIGH is okay for 64-bit.
	(mask_constant): HOST_WIDE_INT parameter.
	(non_and_cint_operand): Delete.
	(mask64_operand): New function.
	(and64_operand): New function.
	(function_arg_advance): DImode arguments do not need special
	alignment when 64-bit.
	(function_arg): Likewise.
	(setup_incoming_varargs): Reverse reg_size assignment.
	(print_operand): HOST_WIDE_INT second parameter.
	(print_operand, 'B'): New case.
	(print_operand, 'M'): Fix typo in lossage string.
	(print_operandm 'S'): New case.
	(rs6000_stack_info): Reverse reg_size assignment.  Use total_raw_size
	to compute AIX push_p.  Use reg_size to compute {cr,lr}_save_offset.
	(rs6000_output_load_toc_table): Reverse init_ptr assignment.  Use
	TARGET_64BIT not TARGET_POWERPC64.  Convert fprintf to fputs.
	Load GOT highpart, don't add it.  Add lowpart with {cal|la}.
	(rs6000_allocate_stack_space): Use {cal|la}.
	(output_epilog): Use {cal|la}
	(output_function_profiler): Add call glue to mcount call.
	Load GOT highpart, don't add it.  Add lowpart with {cal|la}.
	* rs6000/rs6000.h (TARGET_SWITCHES): Add powerpc64.
	(STACK_BOUNDARY): Depend on TARGET_32BIT.
	(ADJUST_FIELD_ALIGN): Calculate array alignment using innermost type.
	(CONST_OK_FOR_LETTER_P): Don't assume 32-bit CONST_INT.
	(EXTRA_CONSTRAINTS): Remove NT 'S' and 'T'.  Replace 'S' with
	64-bit mask operand.
	(RS6000_SAVE_TOC): Depend on TARGET_32BIT.
	(STACK_SAVEAREA_MODE): New macro.
	(LEGITIMATE_CONSTANT_P): DImode okay for 64bit.
	(LEGITIMIZE_RELOAD_ADDRESS): New macro.
	(RTX_COSTS, AND/IOR/XOR): Reflect current machine description.
	(ASM_FILE_START): Emit 64-bit ABI directive.
	(ASM_DECLARE_FUNCTION_NAME): Align CSECT on doubleword in 64-bit mode.
	(ASM_OUTPUT_SPECIAL_POOL_ENTRY): DImode okay for 64-bit.
	(PREDICATE_CODES): Add "and64_operand" and "mask64_operand".
	Delete "non_and_cint_operand".  "input_operand" includes CONST_DOUBLE.
	* rs6000/rs6000.md (iorsi3, xorsi3): Use HOST_WIDE_INT for mask.
	Restore define_splits.
	(floatsidf2, floatunssidf2): Remove !TARGET_POWERPC64 final constraint.
	(floatsidf2_internal, floatunssidf2_internal2): Likewise.
	Do not specify base register operand mode.
	(floatsidf2_loadaddr): Do not specify base register operand mode.
	(floatsidf2_store1, floatsidf2_store2): Operand 1 must be base
	register; do not specify mode.  Remove !TARGET_POWERPC64 final
	constraint.
	(floatsidf2_load): Do not specify base register operand mode.  Remove
	!TARGET_POWERPC64 final constraint.
	(fix_truncdfsi2_internal, fix_truncdfsi2_{store,load}): Do not specify
	base register operand mode.
	(adddi3): Split large constants early.
	(absdi3): Shift by 63, not 31.
	(*mulsidi3_ppc64): New pattern.
	(rotldi3): Add masking combiner patterns.
	(anddi3): Add rldic{r,l} masking.  Remove split of large constants
	because PPC insns zero-extend.
	(iordi3, xordi3): Split large constants early.
	(movsi matcher): Remove S and T constraints.
	(movsf const_double): create SImode constant from TARGET_DOUBLE.
	(movdf_hardfloat32): Add default abort() case.
	(movdf easy_fp_const): create DImode constant from TARGET_DOUBLE.
	(movdi): Remove 64-bit constant generator.  Try to convert
	CONST_DOUBLE to CONST_INT.  Handle TOC memory constants.
	(movdi_32): Add default abort() case.
	(movdi_64): Add numerous ways to split 64-bit constants.
	Make catch-all define_split more optimal and never FAIL.
	(movti_ppc64): Add default abort() case.
	(allocate_stack): Remove operand modes.  Use Pmode.
	(restore_stack_block): Remove operand modes.  Generate Pmode
	temporary.
	(save_stack_nonlocal, restore_stack_nonlocal):  Generate Pmode
	temporary.  Save area is double Pmode.
	(call_indirect_aix64, call_value_indirect_aix64): New patterns.
	(call, call_value): Do not specify address operand mode.  Choose
	appropriate AIX ABI.
	(*call_local64, *ret_call_local64): New patterns.
	(*call_nonlocal_aix64, *ret_call_nonlocal_aix64): New patterns.
	(*ret_call_nonlocal_aix32): Use call_value_indirect for REG.
	(compare): Materialize DImode truthvalues.

From-SVN: r20229
parent a66c6fe2
Showing with 516 additions and 118 deletions
gcc/ChangeLog
Thu Jun 4 14:35:27 1998 David Edelsohn <edelsohn@mhpcc.edu>
* tree.c (get_inner_array_type): New function.
* tree.h (get_inner_array_type): Prototype.
* expr.h (STACK_SAVEAREA_MODE): New macro.
* expr.c (expand_builtin_setjmp): Initialize sa_mode using
STACK_SAVEAREA_MODE.
(expand_builtin_longjmp): Likewise.
* explow.c (emit_stack_save): Likewise.
(allocate_dynamic_stack_space): Use Pmode not insn_operand_mode.
* rs6000/aix41.h (ASM_CPU_SPEC): Define relative to ASM_DEFAULT_SPEC.
(CPP_CPU_SPEC): Define relative to CPU_DEFAULT_SPEC.
* rs6000/aix43.h: New file.
* rs6000/t-aix43: New file.
* rs6000/x-aix41: New file.
* rs6000/x-aix43: New file.
* configure.in (rs6000-ibm-aix*): Use them.
* rs6000/powerpc.h: Delete.
* rs6000/sysv4.h: Move necessary powerpc.h definitions to here.
* rs6000/netware.h: and here.
* rs6000/win-nt.h: and here.
* rs6000/rs6000.c (processor_target_table, 620): Do not affect
MASK_POWERPC64.
(rs6000_override_options): Ignore flag_pic for AIX.
(rs6000_immed_double_const): Delete.
(u_short_cint_operand): Don't assume 32-bit CONST_INT.
(reg_or_u_short_operand): Don't assume 32-bit CONST_INT.
(num_insns_constant): mask64_operand() is 2 insns.
(logical_operand): Don't assume 32-bit CONST_INT.
(non_logical_cint_operand): Don't assume 32-bit CONST_INT.
(easy_fp_constant): Any CONST_DOUBLE_HIGH is okay for 64-bit.
(mask_constant): HOST_WIDE_INT parameter.
(non_and_cint_operand): Delete.
(mask64_operand): New function.
(and64_operand): New function.
(function_arg_advance): DImode arguments do not need special
alignment when 64-bit.
(function_arg): Likewise.
(setup_incoming_varargs): Reverse reg_size assignment.
(print_operand): HOST_WIDE_INT second parameter.
(print_operand, 'B'): New case.
(print_operand, 'M'): Fix typo in lossage string.
(print_operandm 'S'): New case.
(rs6000_stack_info): Reverse reg_size assignment. Use total_raw_size
to compute AIX push_p. Use reg_size to compute {cr,lr}_save_offset.
(rs6000_output_load_toc_table): Reverse init_ptr assignment. Use
TARGET_64BIT not TARGET_POWERPC64. Convert fprintf to fputs.
Load GOT highpart, don't add it. Add lowpart with {cal|la}.
(rs6000_allocate_stack_space): Use {cal|la}.
(output_epilog): Use {cal|la}
(output_function_profiler): Add call glue to mcount call.
Load GOT highpart, don't add it. Add lowpart with {cal|la}.
* rs6000/rs6000.h (TARGET_SWITCHES): Add powerpc64.
(STACK_BOUNDARY): Depend on TARGET_32BIT.
(ADJUST_FIELD_ALIGN): Calculate array alignment using innermost type.
(CONST_OK_FOR_LETTER_P): Don't assume 32-bit CONST_INT.
(EXTRA_CONSTRAINTS): Remove NT 'S' and 'T'. Replace 'S' with
64-bit mask operand.
(RS6000_SAVE_TOC): Depend on TARGET_32BIT.
(STACK_SAVEAREA_MODE): New macro.
(LEGITIMATE_CONSTANT_P): DImode okay for 64bit.
(LEGITIMIZE_RELOAD_ADDRESS): New macro.
(RTX_COSTS, AND/IOR/XOR): Reflect current machine description.
(ASM_FILE_START): Emit 64-bit ABI directive.
(ASM_DECLARE_FUNCTION_NAME): Align CSECT on doubleword in 64-bit mode.
(ASM_OUTPUT_SPECIAL_POOL_ENTRY): DImode okay for 64-bit.
(PREDICATE_CODES): Add "and64_operand" and "mask64_operand".
Delete "non_and_cint_operand". "input_operand" includes CONST_DOUBLE.
* rs6000/rs6000.md (iorsi3, xorsi3): Use HOST_WIDE_INT for mask.
Restore define_splits.
(floatsidf2, floatunssidf2): Remove !TARGET_POWERPC64 final constraint.
(floatsidf2_internal, floatunssidf2_internal2): Likewise.
Do not specify base register operand mode.
(floatsidf2_loadaddr): Do not specify base register operand mode.
(floatsidf2_store1, floatsidf2_store2): Operand 1 must be base
register; do not specify mode. Remove !TARGET_POWERPC64 final
constraint.
(floatsidf2_load): Do not specify base register operand mode. Remove
!TARGET_POWERPC64 final constraint.
(fix_truncdfsi2_internal, fix_truncdfsi2_{store,load}): Do not specify
base register operand mode.
(adddi3): Split large constants early.
(absdi3): Shift by 63, not 31.
(*mulsidi3_ppc64): New pattern.
(rotldi3): Add masking combiner patterns.
(anddi3): Add rldic{r,l} masking. Remove split of large constants
because PPC insns zero-extend.
(iordi3, xordi3): Split large constants early.
(movsi matcher): Remove S and T constraints.
(movsf const_double): create SImode constant from TARGET_DOUBLE.
(movdf_hardfloat32): Add default abort() case.
(movdf easy_fp_const): create DImode constant from TARGET_DOUBLE.
(movdi): Remove 64-bit constant generator. Try to convert
CONST_DOUBLE to CONST_INT. Handle TOC memory constants.
(movdi_32): Add default abort() case.
(movdi_64): Add numerous ways to split 64-bit constants.
Make catch-all define_split more optimal and never FAIL.
(movti_ppc64): Add default abort() case.
(allocate_stack): Remove operand modes. Use Pmode.
(restore_stack_block): Remove operand modes. Generate Pmode
temporary.
(save_stack_nonlocal, restore_stack_nonlocal): Generate Pmode
temporary. Save area is double Pmode.
(call_indirect_aix64, call_value_indirect_aix64): New patterns.
(call, call_value): Do not specify address operand mode. Choose
appropriate AIX ABI.
(*call_local64, *ret_call_local64): New patterns.
(*call_nonlocal_aix64, *ret_call_nonlocal_aix64): New patterns.
(*ret_call_nonlocal_aix32): Use call_value_indirect for REG.
(compare): Materialize DImode truthvalues.
Thu Jun 4 01:26:57 1998 Craig Burley <burley@gnu.org>
* expr.c (safe_from_p): Avoid combinatorial explosion
......
gcc/config/rs6000/aix41.h
/* Definitions of target machine for GNU compiler,
for IBM RS/6000 POWER running AIX version 4.1.
Copyright (C) 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
Contributed by David Edelsohn (edelsohn@npac.syr.edu).
This file is part of GNU CC.
......@@ -38,15 +38,13 @@ Boston, MA 02111-1307, USA. */
/* Common ASM definitions used by ASM_SPEC amonst the various targets
for handling -mcpu=xxx switches. */
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{!mcpu*: \
%{mpower: %{!mpower2: -mpwr}} \
%{mpower2: -mpwr2} \
%{mpowerpc*: -mppc} \
%{mno-power: %{!mpowerpc*: -mcom}} \
%{!mno-power: %{!mpower2: %(asm_default)}}} \
%{!mpower*: %{!mpowerpc*: %(asm_default)}}} \
%{mcpu=common: -mcom} \
%{mcpu=power: -mpwr} \
%{mcpu=power2: -mpwr2} \
......@@ -67,6 +65,9 @@ Boston, MA 02111-1307, USA. */
%{mcpu=821: -mppc} \
%{mcpu=860: -mppc}"
#undef ASM_DEFAULT_SPEC
#define ASM_DEFAULT_SPEC "-mcom"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_AIX41 \
-Asystem(unix) -Asystem(aix)"
......@@ -77,12 +78,38 @@ Boston, MA 02111-1307, USA. */
%{mthreads: -D_THREAD_SAFE}\
%(cpp_cpu)"
/* Common CPP definitions used by CPP_SPEC among the various targets
for handling -mcpu=xxx switches. */
#undef CPP_CPU_SPEC
#define CPP_CPU_SPEC \
"%{!mcpu*: \
%{mpower: %{!mpower2: -D_ARCH_PWR}} \
%{mpower2: -D_ARCH_PWR2} \
%{mpowerpc*: -D_ARCH_PPC} \
%{!mpower*: %{!mpowerpc*: %(cpp_default)}}} \
%{mcpu=common: -D_ARCH_COM} \
%{mcpu=power: -D_ARCH_PWR} \
%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mcpu=rios2: -D_ARCH_PWR2} \
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
%{mcpu=620: -D_ARCH_PPC} \
%{mcpu=821: -D_ARCH_PPC} \
%{mcpu=860: -D_ARCH_PPC}"
#undef CPP_DEFAULT_SPEC
#define CPP_DEFAULT_SPEC "-D_ARCH_COM"
#undef ASM_DEFAULT_SPEC
#define ASM_DEFAULT_SPEC "-mcom"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT MASK_NEW_MNEMONICS
......
gcc/config/rs6000/aix43.h 0 → 100644
/* Definitions of target machine for GNU compiler,
for IBM RS/6000 POWER running AIX version 4.3.
Copyright (C) 1998 Free Software Foundation, Inc.
Contributed by David Edelsohn (edelsohn@mhpcc.edu).
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Enable AIX XL compiler calling convention breakage compatibility. */
#define MASK_XL_CALL 0x40000000
#define TARGET_XL_CALL (target_flags & MASK_XL_CALL)
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{"aix64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC}, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64)}, \
{"xl-call", MASK_XL_CALL}, \
{"no-xl-call", - MASK_XL_CALL}, \
{"threads", 0}, \
{"pe", 0},
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
`OVERRIDE_OPTIONS' to take account of this. This macro, if
defined, is executed once just after all the command options have
been parsed.
The macro SUBTARGET_OVERRIDE_OPTIONS is provided for subtargets, to
get control. */
#define NON_POWERPC_MASKS (MASK_POWER | MASK_POWER2 | MASK_STRING)
#define SUBTARGET_OVERRIDE_OPTIONS \
do { \
if (TARGET_64BIT && (target_flags & NON_POWERPC_MASKS)) \
{ \
target_flags &= ~NON_POWERPC_MASKS; \
error ("-maix64 and POWER architecture are incompatible."); \
} \
} while (0);
#include "rs6000/rs6000.h"
#undef ASM_SPEC
#define ASM_SPEC "-u %{maix64:-a64 -mppc64} %(asm_cpu)"
/* Common ASM definitions used by ASM_SPEC amonst the various targets
for handling -mcpu=xxx switches. */
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{!mcpu*: %{!maix64: \
%{mpower: %{!mpower2: -mpwr}} \
%{mpower2: -mpwr2} \
%{mpowerpc*: %{!mpowerpc64: -mppc}} \
%{mpowerpc64: -mppc64} \
%{!mpower*: %{!mpowerpc*: %(asm_default)}}}} \
%{mcpu=common: -mcom} \
%{mcpu=power: -mpwr} \
%{mcpu=power2: -mpwr2} \
%{mcpu=powerpc: -mppc} \
%{mcpu=rios: -mpwr} \
%{mcpu=rios1: -mpwr} \
%{mcpu=rios2: -mpwr2} \
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -m603} \
%{mcpu=603e: -m603} \
%{mcpu=604: -m604} \
%{mcpu=620: -mppc} \
%{mcpu=821: -mppc} \
%{mcpu=860: -mppc}"
#undef ASM_DEFAULT_SPEC
#define ASM_DEFAULT_SPEC "-mcom"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_AIX41 -D_AIX43 \
-Asystem(unix) -Asystem(aix)"
#undef CPP_SPEC
#define CPP_SPEC "%{posix: -D_POSIX_SOURCE}\
%{maix64: -D__64BIT__ -D_ARCH_PPC}\
%{mpe: -I/usr/lpp/ppe.poe/include}\
%{mthreads: -D_THREAD_SAFE}\
%(cpp_cpu)"
/* Common CPP definitions used by CPP_SPEC among the various targets
for handling -mcpu=xxx switches. */
#undef CPP_CPU_SPEC
#define CPP_CPU_SPEC \
"%{!mcpu*: %{!maix64: \
%{mpower: %{!mpower2: -D_ARCH_PWR}} \
%{mpower2: -D_ARCH_PWR2} \
%{mpowerpc*: -D_ARCH_PPC} \
%{!mpower*: %{!mpowerpc*: %(cpp_default)}}}} \
%{mcpu=common: -D_ARCH_COM} \
%{mcpu=power: -D_ARCH_PWR} \
%{mcpu=power2: -D_ARCH_PWR2} \
%{mcpu=powerpc: -D_ARCH_PPC} \
%{mcpu=rios: -D_ARCH_PWR} \
%{mcpu=rios1: -D_ARCH_PWR} \
%{mcpu=rios2: -D_ARCH_PWR2} \
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
%{mcpu=620: -D_ARCH_PPC} \
%{mcpu=821: -D_ARCH_PPC} \
%{mcpu=860: -D_ARCH_PPC}"
#undef CPP_DEFAULT_SPEC
#define CPP_DEFAULT_SPEC "-D_ARCH_COM"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT MASK_NEW_MNEMONICS
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_PPC604
/* Define this macro as a C expression for the initializer of an
array of string to tell the driver program which options are
defaults for this target and thus do not need to be handled
specially when using `MULTILIB_OPTIONS'.
Do not define this macro if `MULTILIB_OPTIONS' is not defined in
the target makefile fragment or if none of the options listed in
`MULTILIB_OPTIONS' are set by default. *Note Target Fragment::. */
#undef MULTILIB_DEFAULTS
#define MULTILIB_DEFAULTS { "mcpu=common" }
/* These are not necessary when we pass -u to the assembler, and undefining
them saves a great deal of space in object files. */
#undef ASM_OUTPUT_EXTERNAL
#undef ASM_OUTPUT_EXTERNAL_LIBCALL
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
{ rtx _symref = XEXP (DECL_RTL (DECL), 0); \
if ((TREE_CODE (DECL) == VAR_DECL \
|| TREE_CODE (DECL) == FUNCTION_DECL) \
&& (NAME)[strlen (NAME) - 1] != ']') \
{ \
char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
strcpy (_name, XSTR (_symref, 0)); \
strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
XSTR (_symref, 0) = _name; \
} \
}
#undef LIB_SPEC
#define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
%{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}}\
%{mpe:-L/usr/lpp/ppe.poe/lib -lmpi -lvtd}\
%{mthreads: -L/usr/lib/threads -lpthreads -lc_r /usr/lib/libc.a}\
%{!mthreads: -lc}"
#undef LINK_SPEC
#define LINK_SPEC "-bpT:0x10000000 -bpD:0x20000000 %{!r:-btextro} -bnodelcsect\
%{static:-bnso %(link_syscalls) } %{!shared: %{g*: %(link_libg) }}\
%{shared:-bM:SRE %{!e:-bnoentry}} %{maix64:-b64}"
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%{!shared:\
%{mpe:%{pg:/usr/lpp/ppe.poe/lib/gcrt0.o}\
%{!pg:%{p:/usr/lpp/ppe.poe/lib/mcrt0.o}\
%{!p:/usr/lpp/ppe.poe/lib/crt0.o}}}\
%{!mpe:\
%{maix64:%{pg:gcrt0_64%O%s}%{!pg:%{p:mcrt0_64%O%s}%{!p:crt0_64%O%s}}}\
%{!maix64:\
%{mthreads:%{pg:gcrt0_r%O%s}%{!pg:%{p:mcrt0_r%O%s}%{!p:crt0_r%O%s}}}\
%{!mthreads:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}}}"
/* AIX 4.3 typedefs ptrdiff_t as "long" while earlier releases used "int". */
#undef PTRDIFF_TYPE
#define PTRDIFF_TYPE "long int"
gcc/config/rs6000/netware.h
/* Core target definitions for GNU compiler
for IBM RS/6000 PowerPC running NetWare
Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
......@@ -21,7 +21,17 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
#define TARGET_AIX 0
#include "rs6000/powerpc.h"
#define CPP_DEFAULT_SPEC "-D_ARCH_PPC"
#define ASM_DEFAULT_SPEC "-mppc"
#include "rs6000/rs6000.h"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_PPC601
/* Don't generate XCOFF debugging information. */
......
gcc/config/rs6000/powerpc.h deleted 100644 → 0
/* Definitions of target machine for GNU compiler,
for IBM RS/6000 PowerPC running AIX version 3.2.
Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
Contributed by David Edelsohn (edelsohn@npac.syr.edu).
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GNU CC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "rs6000/rs6000.h"
#undef ASM_SPEC
#define ASM_SPEC "-u %(asm_cpu)"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
-Asystem(unix) -Asystem(aix) -Acpu(powerpc) -Amachine(powerpc)"
#undef CPP_DEFAULT_SPEC
#define CPP_DEFAULT_SPEC "-D_ARCH_PPC"
#undef ASM_DEFAULT_SPEC
#define ASM_DEFAULT_SPEC "-mppc"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_PPC601
/* These are not necessary when we pass -u to the assembler, and undefining
them saves a great deal of space in object files. */
#undef ASM_OUTPUT_EXTERNAL
#undef ASM_OUTPUT_EXTERNAL_LIBCALL
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
{ rtx _symref = XEXP (DECL_RTL (DECL), 0); \
if ((TREE_CODE (DECL) == VAR_DECL \
|| TREE_CODE (DECL) == FUNCTION_DECL) \
&& (NAME)[strlen (NAME) - 1] != ']') \
{ \
char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
strcpy (_name, XSTR (_symref, 0)); \
strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
XSTR (_symref, 0) = _name; \
} \
}
gcc/config/rs6000/sysv4.h
......@@ -266,7 +266,17 @@ do { \
/* Default ABI to compile code for */
#define DEFAULT_ABI rs6000_current_abi
#include "rs6000/powerpc.h"
#define CPP_DEFAULT_SPEC "-D_ARCH_PPC"
#define ASM_DEFAULT_SPEC "-mppc"
#include "rs6000/rs6000.h"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_PPC601
/* System V.4 uses register 13 as a pointer to the small data area,
so it is not available to the normal user. */
......
gcc/config/rs6000/t-aix43 0 → 100644
# Do not build libgcc1.
LIBGCC1 =
CROSS_LIBGCC1 =
# These are really part of libgcc1, but this will cause them to be
# built correctly, so... [taken from t-sparclite]
LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
cat $(srcdir)/config/fp-bit.c > dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
# Build the libraries for both hard and soft floating point and all of the
# different processor models
MULTILIB_OPTIONS = msoft-float \
mcpu=common/mcpu=power/mcpu=powerpc/maix64
MULTILIB_DIRNAMES = soft-float \
common power powerpc aix64
MULTILIB_MATCHES = msoft-float=mcpu?403 \
maix64=maix64 \
mcpu?power=mpower \
mcpu?power=mrios1 \
mcpu?power=mcpu?rios1 \
mcpu?power=mcpu?rsc \
mcpu?power=mcpu?rsc1 \
mcpu?power=mpower2 \
mcpu?power=mrios2 \
mcpu?power=mcpu=rios2 \
mcpu?powerpc=mcpu?601 \
mcpu?powerpc=mcpu?602 \
mcpu?powerpc=mcpu?603 \
mcpu?powerpc=mcpu?603e \
mcpu?powerpc=mcpu?604 \
mcpu?powerpc=mcpu?620 \
mcpu?powerpc=mcpu?403 \
mcpu?powerpc=mpowerpc \
mcpu?powerpc=mpowerpc-gpopt \
mcpu?powerpc=mpowerpc-gfxopt
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
gcc/config/rs6000/win-nt.h
/* Definitions of target machine for GNU compiler, for PowerPC
running Windows/NT.
Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
......@@ -27,12 +27,21 @@ Boston, MA 02111-1307, USA. */
/* Default ABI to compile code for */
#define DEFAULT_ABI ABI_NT
#include "rs6000/powerpc.h"
#define CPP_DEFAULT_SPEC "-D_ARCH_PPC"
#define ASM_DEFAULT_SPEC "-mppc"
/* Pseudo target that we can test in the md file. */
#undef TARGET_WINDOWS_NT
#define TARGET_WINDOWS_NT 1
#include "rs6000/rs6000.h"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_POWERPC
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-DWIN32 -D_WIN32 \
-DWINNT -D__STDC__=0 -DALMOST_STDC \
......@@ -71,9 +80,6 @@ Boston, MA 02111-1307, USA. */
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_POWERPC
/* NT always runs little endian */
#undef BYTES_BIG_ENDIAN
#define BYTES_BIG_ENDIAN 0
......@@ -113,9 +119,6 @@ Boston, MA 02111-1307, USA. */
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)
#undef PROCESSOR_DEFAULT
#define PROCESSOR_DEFAULT PROCESSOR_PPC601
/* Address to save the TOC register */
#undef RS6000_SAVE_TOC
#define RS6000_SAVE_TOC plus_constant (virtual_incoming_args_rtx, -RS6000_SAVE_AREA - 8)
......@@ -162,7 +165,7 @@ do { \
ASM_OUTPUT_SKIP (FILE, SIZE); \
} while (0)
/* Describe how to emit unitialized external linkage items */
/* Describe how to emit uninitialized external linkage items */
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
do { \
ASM_GLOBALIZE_LABEL (FILE, NAME); \
......
gcc/config/rs6000/x-aix41 0 → 100644
# configuration for IBM RS/6000 running AIX 4.1+
# Show we need to use the C version of ALLOCA
ALLOCA=alloca.o
# We need -lld for collect2 (actually this only matters
# for a native compiler, but this is as good a place as any
# to define the symbol).
CLIB=-lld
# f771 and cc1plus overflow the AIX TOC
BOOT_LDFLAGS=-Wl,-bbigtoc
gcc/config/rs6000/x-aix43 0 → 100644
# configuration for IBM RS/6000 running AIX 4.3+
# Show we need to use the C version of ALLOCA
ALLOCA=alloca.o
# We need -lld for collect2 (actually this only matters
# for a native compiler, but this is as good a place as any
# to define the symbol).
CLIB=-lld
# f771 and cc1plus overflow the AIX TOC
BOOT_LDFLAGS=-Wl,-bbigtoc
# Both 32-bit and 64-bit objects in archives
AR=ar -X32_64
gcc/configure.in
......@@ -2443,7 +2443,7 @@ for machine in $build $host $target; do
fi
use_collect2=yes
;;
rs6000-ibm-aix[[456789]].* | powerpc-ibm-aix[[456789]].*)
rs6000-ibm-aix4.[[12]].* | powerpc-ibm-aix4.[[12]].*)
tm_file=rs6000/aix41.h
if [[ x$host != x$target ]]
then
......@@ -2451,7 +2451,29 @@ for machine in $build $host $target; do
else
tmake_file=rs6000/t-newas
fi
xmake_file=rs6000/x-aix31
xmake_file=rs6000/x-aix41
use_collect2=yes
;;
rs6000-ibm-aix4.[[3456789]].* | powerpc-ibm-aix4.[[3456789]].*)
tm_file=rs6000/aix43.h
if [[ x$host != x$target ]]
then
tmake_file=rs6000/t-xaix43
else
tmake_file=rs6000/t-aix43
fi
xmake_file=rs6000/x-aix43
use_collect2=yes
;;
rs6000-ibm-aix[[56789]].* | powerpc-ibm-aix[[56789]].*)
tm_file=rs6000/aix43.h
if [[ x$host != x$target ]]
then
tmake_file=rs6000/t-xaix43
else
tmake_file=rs6000/t-aix43
fi
xmake_file=rs6000/x-aix43
use_collect2=yes
;;
rs6000-ibm-aix*)
......
gcc/explow.c
......@@ -867,7 +867,7 @@ emit_stack_save (save_level, psave, after)
rtx sa = *psave;
/* The default is that we use a move insn and save in a Pmode object. */
rtx (*fcn) () = gen_move_insn;
enum machine_mode mode = Pmode;
enum machine_mode mode = STACK_SAVEAREA_MODE (save_level);
/* See if this machine has anything special to do for this kind of save. */
switch (save_level)
......@@ -875,28 +875,19 @@ emit_stack_save (save_level, psave, after)
#ifdef HAVE_save_stack_block
case SAVE_BLOCK:
if (HAVE_save_stack_block)
{
fcn = gen_save_stack_block;
mode = insn_operand_mode[CODE_FOR_save_stack_block][0];
}
fcn = gen_save_stack_block;
break;
#endif
#ifdef HAVE_save_stack_function
case SAVE_FUNCTION:
if (HAVE_save_stack_function)
{
fcn = gen_save_stack_function;
mode = insn_operand_mode[CODE_FOR_save_stack_function][0];
}
fcn = gen_save_stack_function;
break;
#endif
#ifdef HAVE_save_stack_nonlocal
case SAVE_NONLOCAL:
if (HAVE_save_stack_nonlocal)
{
fcn = gen_save_stack_nonlocal;
mode = insn_operand_mode[(int) CODE_FOR_save_stack_nonlocal][0];
}
fcn = gen_save_stack_nonlocal;
break;
#endif
default:
......@@ -975,7 +966,6 @@ emit_stack_restore (save_level, sa, after)
break;
#endif
#ifdef HAVE_restore_stack_nonlocal
case SAVE_NONLOCAL:
if (HAVE_restore_stack_nonlocal)
fcn = gen_restore_stack_nonlocal;
......@@ -1243,18 +1233,15 @@ allocate_dynamic_stack_space (size, target, known_align)
#ifdef HAVE_allocate_stack
if (HAVE_allocate_stack)
{
enum machine_mode mode;
if (insn_operand_predicate[(int) CODE_FOR_allocate_stack][0]
&& ! ((*insn_operand_predicate[(int) CODE_FOR_allocate_stack][0])
(target, Pmode)))
target = copy_to_mode_reg (Pmode, target);
mode = insn_operand_mode[(int) CODE_FOR_allocate_stack][1];
size = convert_modes (mode, ptr_mode, size, 1);
size = convert_modes (Pmode, ptr_mode, size, 1);
if (insn_operand_predicate[(int) CODE_FOR_allocate_stack][1]
&& ! ((*insn_operand_predicate[(int) CODE_FOR_allocate_stack][1])
(size, mode)))
size = copy_to_mode_reg (mode, size);
(size, Pmode)))
size = copy_to_mode_reg (Pmode, size);
emit_insn (gen_allocate_stack (target, size));
}
......
gcc/expr.c
......@@ -7771,7 +7771,8 @@ expand_builtin_setjmp (buf_addr, target, first_label, next_label)
rtx first_label, next_label;
{
rtx lab1 = gen_label_rtx ();
enum machine_mode sa_mode = Pmode, value_mode;
enum machine_mode sa_mode = STACK_SAVEAREA_MODE (SAVE_NONLOCAL);
enum machine_mode value_mode;
rtx stack_save;
value_mode = TYPE_MODE (integer_type_node);
......@@ -7803,11 +7804,6 @@ expand_builtin_setjmp (buf_addr, target, first_label, next_label)
GET_MODE_SIZE (Pmode)))),
gen_rtx_LABEL_REF (Pmode, lab1));
#ifdef HAVE_save_stack_nonlocal
if (HAVE_save_stack_nonlocal)
sa_mode = insn_operand_mode[(int) CODE_FOR_save_stack_nonlocal][0];
#endif
stack_save = gen_rtx_MEM (sa_mode,
plus_constant (buf_addr,
2 * GET_MODE_SIZE (Pmode)));
......@@ -7899,7 +7895,7 @@ expand_builtin_longjmp (buf_addr, value)
rtx buf_addr, value;
{
rtx fp, lab, stack;
enum machine_mode sa_mode;
enum machine_mode sa_mode = STACK_SAVEAREA_MODE (SAVE_NONLOCAL);
#ifdef POINTERS_EXTEND_UNSIGNED
buf_addr = convert_memory_address (Pmode, buf_addr);
......@@ -7942,14 +7938,6 @@ expand_builtin_longjmp (buf_addr, value)
lab = gen_rtx_MEM (Pmode, plus_constant (buf_addr,
GET_MODE_SIZE (Pmode)));
#ifdef HAVE_save_stack_nonlocal
sa_mode = (HAVE_save_stack_nonlocal
? insn_operand_mode[(int) CODE_FOR_save_stack_nonlocal][0]
: Pmode);
#else
sa_mode = Pmode;
#endif
stack = gen_rtx_MEM (sa_mode, plus_constant (buf_addr,
2 * GET_MODE_SIZE (Pmode)));
......
gcc/expr.h
......@@ -245,6 +245,13 @@ enum direction {none, upward, downward}; /* Value has this type. */
#define RETURN_IN_MEMORY(TYPE) (TYPE_MODE (TYPE) == BLKmode)
#endif
/* Supply a default definition of STACK_SAVEAREA_MODE for emit_stack_save.
Normally move_insn, so Pmode stack pointer. */
#ifndef STACK_SAVEAREA_MODE
#define STACK_SAVEAREA_MODE(LEVEL) Pmode
#endif
/* Provide default values for the macros controlling stack checking. */
#ifndef STACK_CHECK_BUILTIN
......
gcc/tree.c
......@@ -4242,6 +4242,21 @@ build_array_type (elt_type, index_type)
return t;
}
/* Return the TYPE of the elements comprising
the innermost dimension of ARRAY. */
tree
get_inner_array_type (array)
tree array;
{
tree type = TREE_TYPE (array);
while (TREE_CODE (type) == ARRAY_TYPE)
type = TREE_TYPE (type);
return type;
}
/* Construct, lay out and return
the type of functions returning type VALUE_TYPE
given arguments of types ARG_TYPES.
......
gcc/tree.h
......@@ -1393,6 +1393,7 @@ extern int tree_int_cst_equal PROTO((tree, tree));
extern int tree_int_cst_lt PROTO((tree, tree));
extern int tree_int_cst_sgn PROTO((tree));
extern int index_type_equal PROTO((tree, tree));
extern tree get_inner_array_type PROTO((tree));
/* From expmed.c. Since rtl.h is included after tree.h, we can't
put the prototype here. Rtl.h does declare the prototype if
......
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