Commit a1fdc802 by Stephane Carrez Committed by Stephane Carrez

m68hc11.md ("*logicalsi3_silshr16"): Use '?' instead of '!' for the 'D'…

m68hc11.md ("*logicalsi3_silshr16"): Use '?' instead of '!' for the 'D' alternative ('!' is too strong).

	* config/m68hc11/m68hc11.md ("*logicalsi3_silshr16"): Use '?' instead
	of '!' for the 'D' alternative ('!' is too strong).
	("*logicalsi3_silshl16"): Likewise.
	("movstricthi"): Accept 'A' when 'd' constraint, remove spurious '+'.
	("movstrictsi"): Remove spurious '+'.
	("movstrictqi"): Don't accept 'A' and remove spurious '+'.
	("tstqi_1", "*lshrqi3_const1"): Put 'm' constraint before 'd'.
	("subqi3"): Disparage with '!' the 'x' and 'y' registers to avoid
	a reload to them.

From-SVN: r41859
parent a92644e7
2001-05-05 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/m68hc11.md ("*logicalsi3_silshr16"): Use '?' instead
of '!' for the 'D' alternative ('!' is too strong).
("*logicalsi3_silshl16"): Likewise.
("movstricthi"): Accept 'A' when 'd' constraint, remove spurious '+'.
("movstrictsi"): Remove spurious '+'.
("movstrictqi"): Don't accept 'A' and remove spurious '+'.
("tstqi_1", "*lshrqi3_const1"): Put 'm' constraint before 'd'.
("subqi3"): Disparage with '!' the 'x' and 'y' registers to avoid
a reload to them.
2001-05-04 David Edelsohn <edelsohn@gnu.org> 2001-05-04 David Edelsohn <edelsohn@gnu.org>
* calls.c (store_one_arg): Don't divide align by BITS_PER_UNIT. * calls.c (store_one_arg): Don't divide align by BITS_PER_UNIT.
......
...@@ -207,11 +207,11 @@ ...@@ -207,11 +207,11 @@
(define_insn "tstqi_1" (define_insn "tstqi_1"
[(set (cc0) [(set (cc0)
(match_operand:QI 0 "tst_operand" "d,m,*A,!u"))] (match_operand:QI 0 "tst_operand" "m,d,*A,!u"))]
"" ""
"@ "@
tstb
tst\\t%0 tst\\t%0
tstb
# #
tst\\t%b0") tst\\t%b0")
...@@ -467,7 +467,7 @@ ...@@ -467,7 +467,7 @@
(define_insn "cmpqi_1" (define_insn "cmpqi_1"
[(set (cc0) [(set (cc0)
(compare (match_operand:QI 0 "tst_operand" "d,d,*x*y,*x*y") (compare (match_operand:QI 0 "tst_operand" "d,d,*x*y,*x*y")
(match_operand:QI 1 "cmp_operand" "im,?u,?u,?dim*x*y")))] (match_operand:QI 1 "cmp_operand" "im,!u,!u,?dim*x*y")))]
"" ""
"@ "@
cmpb\\t%1 cmpb\\t%1
...@@ -531,40 +531,40 @@ ...@@ -531,40 +531,40 @@
;; description but not for GCC optimization passes. ;; description but not for GCC optimization passes.
;; ;;
(define_insn "movstrictsi" (define_insn "movstrictsi"
[(set (strict_low_part (match_operand:SI 0 "non_push_operand" "+um,+D,+D")) [(set (strict_low_part (match_operand:SI 0 "non_push_operand" "+um,D,D"))
(match_operand:SI 1 "general_operand" "D,Dim,uD"))] (match_operand:SI 1 "general_operand" "D,Dim,uD"))]
"" ""
"#") "#")
(define_split (define_split
[(set (strict_low_part (match_operand:SI 0 "non_push_operand" "+um,+D,+D")) [(set (strict_low_part (match_operand:SI 0 "non_push_operand" "+um,D,D"))
(match_operand:SI 1 "general_operand" "D,Dim,u"))] (match_operand:SI 1 "general_operand" "D,Dim,u"))]
"z_replacement_completed == 2" "z_replacement_completed == 2"
[(set (match_dup 0) (match_dup 1))] [(set (match_dup 0) (match_dup 1))]
"") "")
(define_insn "movstricthi" (define_insn "movstricthi"
[(set (strict_low_part (match_operand:HI 0 "non_push_operand" "+um,+d,+d")) [(set (strict_low_part (match_operand:HI 0 "non_push_operand" "+um,dA,dA"))
(match_operand:HI 1 "general_operand" "d,dim,u"))] (match_operand:HI 1 "general_operand" "dA,dAim,u"))]
"" ""
"#") "#")
(define_split (define_split
[(set (strict_low_part (match_operand:HI 0 "non_push_operand" "+um,+d,+d")) [(set (strict_low_part (match_operand:HI 0 "non_push_operand" "+um,dA,dA"))
(match_operand:HI 1 "general_operand" "d,dim,u"))] (match_operand:HI 1 "general_operand" "dA,dAim,u"))]
"z_replacement_completed == 2" "z_replacement_completed == 2"
[(set (match_dup 0) (match_dup 1))] [(set (match_dup 0) (match_dup 1))]
"") "")
(define_insn "movstrictqi" (define_insn "movstrictqi"
[(set (strict_low_part (match_operand:QI 0 "non_push_operand" "+mu,+!d")) [(set (strict_low_part (match_operand:QI 0 "non_push_operand" "+mu,!dA"))
(match_operand:QI 1 "general_operand" "d,imu"))] (match_operand:QI 1 "general_operand" "d,imudA"))]
"" ""
"#") "#")
(define_split (define_split
[(set (strict_low_part (match_operand:QI 0 "non_push_operand" "+mu,+d,+d")) [(set (strict_low_part (match_operand:QI 0 "non_push_operand" "+mu,dA"))
(match_operand:QI 1 "general_operand" "d,dim,u"))] (match_operand:QI 1 "general_operand" "d,imudA"))]
"z_replacement_completed == 2" "z_replacement_completed == 2"
[(set (match_dup 0) (match_dup 1))] [(set (match_dup 0) (match_dup 1))]
"") "")
...@@ -2586,9 +2586,9 @@ ...@@ -2586,9 +2586,9 @@
}") }")
(define_insn "subqi3" (define_insn "subqi3"
[(set (match_operand:QI 0 "hard_reg_operand" "=dq*x*y") [(set (match_operand:QI 0 "hard_reg_operand" "=dq,!*x*y")
(minus:QI (match_operand:QI 1 "hard_reg_operand" "0") (minus:QI (match_operand:QI 1 "hard_reg_operand" "0,0")
(match_operand:QI 2 "general_operand" "uim*x*y*d")))] (match_operand:QI 2 "general_operand" "uim*A*d,uim*A*d")))]
"" ""
"* "*
{ {
...@@ -3378,7 +3378,7 @@ ...@@ -3378,7 +3378,7 @@
[(set (match_operand:SI 0 "register_operand" "=D,D") [(set (match_operand:SI 0 "register_operand" "=D,D")
(match_operator:SI 3 "m68hc11_logical_operator" (match_operator:SI 3 "m68hc11_logical_operator"
[(lshiftrt:SI [(lshiftrt:SI
(match_operand:SI 1 "general_operand" "uim,!D") (match_operand:SI 1 "general_operand" "uim,?D")
(const_int 16)) (const_int 16))
(match_operand:SI 2 "general_operand" "uim,0")]))] (match_operand:SI 2 "general_operand" "uim,0")]))]
"" ""
...@@ -3388,7 +3388,7 @@ ...@@ -3388,7 +3388,7 @@
[(set (match_operand:SI 0 "register_operand" "=D,D") [(set (match_operand:SI 0 "register_operand" "=D,D")
(match_operator:SI 3 "m68hc11_logical_operator" (match_operator:SI 3 "m68hc11_logical_operator"
[(lshiftrt:SI [(lshiftrt:SI
(match_operand:SI 1 "general_operand" "uim,!D") (match_operand:SI 1 "general_operand" "uim,?D")
(const_int 16)) (const_int 16))
(match_operand:SI 2 "general_operand" "uim,0")]))] (match_operand:SI 2 "general_operand" "uim,0")]))]
"reload_completed" "reload_completed"
...@@ -3414,7 +3414,7 @@ ...@@ -3414,7 +3414,7 @@
[(set (match_operand:SI 0 "register_operand" "=D,D") [(set (match_operand:SI 0 "register_operand" "=D,D")
(match_operator:SI 3 "m68hc11_logical_operator" (match_operator:SI 3 "m68hc11_logical_operator"
[(ashift:SI [(ashift:SI
(match_operand:SI 1 "general_operand" "uim,!D") (match_operand:SI 1 "general_operand" "uim,?D")
(const_int 16)) (const_int 16))
(match_operand:SI 2 "general_operand" "0,0")]))] (match_operand:SI 2 "general_operand" "0,0")]))]
"" ""
...@@ -3424,7 +3424,7 @@ ...@@ -3424,7 +3424,7 @@
[(set (match_operand:SI 0 "register_operand" "=D,D") [(set (match_operand:SI 0 "register_operand" "=D,D")
(match_operator:SI 3 "m68hc11_logical_operator" (match_operator:SI 3 "m68hc11_logical_operator"
[(ashift:SI [(ashift:SI
(match_operand:SI 1 "general_operand" "uim,!D") (match_operand:SI 1 "general_operand" "uim,?D")
(const_int 16)) (const_int 16))
(match_operand:SI 2 "general_operand" "0,0")]))] (match_operand:SI 2 "general_operand" "0,0")]))]
"z_replacement_completed == 2" "z_replacement_completed == 2"
...@@ -3898,7 +3898,7 @@ ...@@ -3898,7 +3898,7 @@
[(set (match_operand:DI 0 "nonimmediate_operand" "=<,m,u") [(set (match_operand:DI 0 "nonimmediate_operand" "=<,m,u")
(ashift:DI (match_operand:DI 1 "general_operand" "umi,umi,umi") (ashift:DI (match_operand:DI 1 "general_operand" "umi,umi,umi")
(const_int 32))) (const_int 32)))
(clobber (match_scratch:HI 2 "=A,d,d"))] (clobber (match_scratch:HI 2 "=&A,d,d"))]
"" ""
"#") "#")
...@@ -5075,13 +5075,13 @@ ...@@ -5075,13 +5075,13 @@
"") "")
(define_insn "*lshrqi3_const1" (define_insn "*lshrqi3_const1"
[(set (match_operand:QI 0 "nonimmediate_operand" "=d,m,!u,!*q,!*A") [(set (match_operand:QI 0 "nonimmediate_operand" "=m,d,!u,!*q,!*A")
(lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,0,0,0") (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0,0,0,0,0")
(const_int 1)))] (const_int 1)))]
"" ""
"@ "@
lsrb
lsr\\t%b0 lsr\\t%b0
lsrb
lsr\\t%b0 lsr\\t%b0
lsr%0 lsr%0
#") #")
......
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