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riscv-gcc-1
Commit a1aed706 by Adrian Straetling Committed by Ulrich Weigand
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s390.md: ("DBL"): New mode attribute. 

2005-05-13  Adrian Straetling  <straetling@de.ibm.com>

	* config/s390.md: ("DBL"): New mode attribute.
	("*movmem_long_64", "*movmem_long_31"): Merge to "*movmem_long".
	("*clrmem_long_64", "*clrmem_long_31"): Merge to "*clrmem_long".
	("*cmpmem_long_64", "*cmpmem_long_31"): Merge to "*cmpmem_long".

From-SVN: r99654
parent f5c9a097
Showing with 28 additions and 55 deletions
gcc/ChangeLog
2005-05-13 Adrian Straetling <straetling@de.ibm.com>
* config/s390.md: ("DBL"): New mode attribute.
("*movmem_long_64", "*movmem_long_31"): Merge to "*movmem_long".
("*clrmem_long_64", "*clrmem_long_31"): Merge to "*clrmem_long".
("*cmpmem_long_64", "*cmpmem_long_31"): Merge to "*cmpmem_long".
2005-05-13 Richard Guenther <rguenth@gcc.gnu.org>
* c-format.c (check_format_arg): Handle string literals of
......
gcc/config/s390/s390.md
......@@ -329,6 +329,10 @@
;; HImode and "llgc" in QImode.
(define_mode_attr hc [(HI "h") (QI "c")])
;; In P templates, the mode <DBL> will expand to "TI" in DImode and "DI"
;; in SImode.
(define_mode_attr DBL [(DI "TI") (SI "DI")])
;; Maximum unsigned integer that fits in MODE.
(define_mode_attr max_uint [(HI "65535") (QI "255")])
......@@ -1897,28 +1901,15 @@
operands[3] = reg1;
})
(define_insn "*movmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(clobber (match_operand:TI 1 "register_operand" "=d"))
(set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
(mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0)))
(use (match_dup 2))
(use (match_dup 3))
(clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT"
"mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
(define_insn "*movmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d"))
(clobber (match_operand:DI 1 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
(mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0)))
(define_insn "*movmem_long"
[(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
(clobber (match_operand:<DBL> 1 "register_operand" "=d"))
(set (mem:BLK (subreg:P (match_operand:<DBL> 2 "register_operand" "0") 0))
(mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "1") 0)))
(use (match_dup 2))
(use (match_dup 3))
(clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT"
""
"mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
......@@ -2037,26 +2028,14 @@
operands[2] = reg1;
})
(define_insn "*clrmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
(define_insn "*clrmem_long"
[(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
(set (mem:BLK (subreg:P (match_operand:<DBL> 2 "register_operand" "0") 0))
(const_int 0))
(use (match_dup 2))
(use (match_operand:TI 1 "register_operand" "d"))
(use (match_operand:<DBL> 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
"TARGET_64BIT"
"mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
(define_insn "*clrmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
(const_int 0))
(use (match_dup 2))
(use (match_operand:DI 1 "register_operand" "d"))
(clobber (reg:CC CC_REGNUM))]
"!TARGET_64BIT"
""
"mvcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
......@@ -2180,28 +2159,15 @@
operands[3] = reg1;
})
(define_insn "*cmpmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(clobber (match_operand:TI 1 "register_operand" "=d"))
(define_insn "*cmpmem_long"
[(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
(clobber (match_operand:<DBL> 1 "register_operand" "=d"))
(set (reg:CCU CC_REGNUM)
(compare:CCU (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
(mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))))
(compare:CCU (mem:BLK (subreg:P (match_operand:<DBL> 2 "register_operand" "0") 0))
(mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "1") 0))))
(use (match_dup 2))
(use (match_dup 3))]
"TARGET_64BIT"
"clcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
(define_insn "*cmpmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d"))
(clobber (match_operand:DI 1 "register_operand" "=d"))
(set (reg:CCU CC_REGNUM)
(compare:CCU (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
(mem:BLK (subreg:SI (match_operand:DI 3 "register_operand" "1") 0))))
(use (match_dup 2))
(use (match_dup 3))]
"!TARGET_64BIT"
""
"clcle\t%0,%1,0\;jo\t.-4"
[(set_attr "length" "8")
(set_attr "type" "vs")])
......
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