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Commit a1a3ab65 by Uros Bizjak
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i386.md (preferred_for_size): New attribute 

	* config/i386/i386.md (preferred_for_size): New attribute
	(*pushxf): Split Yx*r constraints to r,*r.  Use preferred_for_size
	attribute to conditionally disable alternative 1.
	(*pushdf): Split Yd*r constraints to r,*r.  Use preferred_for_size
	and prefered_for_speed attributes to conditionally disable
	alternative 1.
	(*movxf_internal): Split Yx*r constraints to r,*r.  Use
	preferred_for_size attribute to conditionally disable
	alternatives 3 and 4.
	(*movdf_internal): Split Yd*r constraints to r,*r.  Use
	preferred_for_size and prefered_for_speed attributes to conditionally
	disable alternatives 3 and 4.
	* config/i386/constraints.md (Yd, Yx): Remove register constraints.

From-SVN: r218134
parent 1a336337
Showing with 95 additions and 55 deletions
gcc/ChangeLog
2014-11-27 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (preferred_for_size): New attribute
(*pushxf): Split Yx*r constraints to r,*r. Use preferred_for_size
attribute to conditionally disable alternative 1.
(*pushdf): Split Yd*r constraints to r,*r. Use preferred_for_size
and prefered_for_speed attributes to conditionally disable
alternative 1.
(*movxf_internal): Split Yx*r constraints to r,*r. Use
preferred_for_size attribute to conditionally disable
alternatives 3 and 4.
(*movdf_internal): Split Yd*r constraints to r,*r. Use
preferred_for_size and prefered_for_speed attributes to conditionally
disable alternatives 3 and 4.
* config/i386/constraints.md (Yd, Yx): Remove register constraints.
2014-11-27 Eric Botcazou <ebotcazou@adacore.com>
* dwarf2out.c (set_block_origin_self): Skip nested functions.
2014-11-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/63833
* config/i386/i386.h (REAL_PIC_OFFSET_TABLE_REGNUM): Use
R15_REG for 64-bit.
* config/i386/rdos64.h (REAL_PIC_OFFSET_TABLE_REGNUM): Removed.
PR target/63833
* config/i386/i386.h (REAL_PIC_OFFSET_TABLE_REGNUM): Use
R15_REG for 64-bit.
* config/i386/rdos64.h (REAL_PIC_OFFSET_TABLE_REGNUM): Removed.
2014-11-27 Martin Liska <mliska@suse.cz>
David Malcolm <dmalcolm@redhat.com>
gcc/config/i386/constraints.md
......@@ -105,8 +105,6 @@
;; n MMX inter-unit moves from MMX register enabled
;; a Integer register when zero extensions with AND are disabled
;; p Integer register when TARGET_PARTIAL_REG_STALL is disabled
;; d Integer register when integer DFmode moves are enabled
;; x Integer register when integer XFmode moves are enabled
;; f x87 register when 80387 floating point arithmetic is enabled
(define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
......@@ -137,15 +135,6 @@
? NO_REGS : GENERAL_REGS"
"@internal Any integer register when zero extensions with AND are disabled.")
(define_register_constraint "Yd"
"TARGET_INTEGER_DFMODE_MOVES && optimize_function_for_speed_p (cfun)
? GENERAL_REGS : NO_REGS"
"@internal Any integer register when integer DFmode moves are enabled.")
(define_register_constraint "Yx"
"optimize_function_for_speed_p (cfun) ? GENERAL_REGS : NO_REGS"
"@internal Any integer register when integer XFmode moves are enabled.")
(define_register_constraint "Yf"
"(ix86_fpmath & FPMATH_387) ? FLOAT_REGS : NO_REGS"
"@internal Any x87 register when 80387 FP arithmetic is enabled.")
......
gcc/config/i386/i386.md
......@@ -816,6 +816,7 @@
]
(const_int 1)))
(define_attr "preferred_for_size" "" (const_int 1))
(define_attr "preferred_for_speed" "" (const_int 1))
;; Describe a user's asm statement.
......@@ -2811,22 +2812,26 @@
})
(define_insn "*pushxf"
[(set (match_operand:XF 0 "push_operand" "=<,<")
(match_operand:XF 1 "general_no_elim_operand" "f,Yx*roF"))]
[(set (match_operand:XF 0 "push_operand" "=<,<,<,<")
(match_operand:XF 1 "general_no_elim_operand" "f,r,*r,oF"))]
""
{
/* This insn should be already split before reg-stack. */
gcc_unreachable ();
}
[(set_attr "type" "multi")
(set_attr "unit" "i387,*")
(set_attr "unit" "i387,*,*,*")
(set (attr "mode")
(cond [(eq_attr "alternative" "1")
(cond [(eq_attr "alternative" "1,2,3")
(if_then_else (match_test "TARGET_64BIT")
(const_string "DI")
(const_string "SI"))
]
(const_string "XF")))])
(const_string "XF")))
(set (attr "preferred_for_size")
(cond [(eq_attr "alternative" "1")
(symbol_ref "false")]
(symbol_ref "true")))])
;; %%% Kill this when call knows how to work this out.
(define_split
......@@ -2842,18 +2847,26 @@
})
(define_insn "*pushdf"
[(set (match_operand:DF 0 "push_operand" "=<,<,<,<")
(match_operand:DF 1 "general_no_elim_operand" "f,Yd*roF,rmF,x"))]
[(set (match_operand:DF 0 "push_operand" "=<,<,<,<,<,<")
(match_operand:DF 1 "general_no_elim_operand" "f,r,*r,oF,rmF,x"))]
""
{
/* This insn should be already split before reg-stack. */
gcc_unreachable ();
}
[(set_attr "isa" "*,nox64,x64,sse2")
[(set_attr "isa" "*,nox64,nox64,nox64,x64,sse2")
(set_attr "type" "multi")
(set_attr "unit" "i387,*,*,sse")
(set_attr "mode" "DF,SI,DI,DF")])
(set_attr "unit" "i387,*,*,*,*,sse")
(set_attr "mode" "DF,SI,SI,SI,DI,DF")
(set (attr "preferred_for_size")
(cond [(eq_attr "alternative" "1")
(symbol_ref "false")]
(symbol_ref "true")))
(set (attr "preferred_for_speed")
(cond [(eq_attr "alternative" "1")
(symbol_ref "TARGET_INTEGER_DFMODE_MOVES")]
(symbol_ref "true")))])
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:DF 0 "push_operand")
......@@ -3015,12 +3028,13 @@
]
(const_string "TI")))])
;; Possible store forwarding (partial memory) stall in alternatives 4 and 5.
;; Possible store forwarding (partial memory) stall
;; in alternatives 4, 6, 7 and 8.
(define_insn "*movxf_internal"
[(set (match_operand:XF 0 "nonimmediate_operand"
"=f,m,f,?Yx*r ,!o ,!o")
"=f,m,f,?r ,!o,?*r ,!o,!o,!o")
(match_operand:XF 1 "general_operand"
"fm,f,G,Yx*roF,Yx*rF,Yx*rC"))]
"fm,f,G,roF,r , *roF,*r,F ,C"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& (!can_create_pseudo_p ()
|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
......@@ -3045,22 +3059,36 @@
gcc_unreachable ();
}
}
[(set_attr "isa" "*,*,*,*,nox64,x64")
(set_attr "type" "fmov,fmov,fmov,multi,multi,multi")
[(set (attr "isa")
(cond [(eq_attr "alternative" "7")
(const_string "nox64")
(eq_attr "alternative" "8")
(const_string "x64")
]
(const_string "*")))
(set (attr "type")
(cond [(eq_attr "alternative" "3,4,5,6,7,8")
(const_string "multi")
]
(const_string "fmov")))
(set (attr "mode")
(cond [(eq_attr "alternative" "3,4,5")
(cond [(eq_attr "alternative" "3,4,5,6,7,8")
(if_then_else (match_test "TARGET_64BIT")
(const_string "DI")
(const_string "SI"))
]
(const_string "XF")))])
;; Possible store forwarding (partial memory) stall in alternative 4.
(const_string "XF")))
(set (attr "preferred_for_size")
(cond [(eq_attr "alternative" "3,4")
(symbol_ref "false")]
(symbol_ref "true")))])
;; Possible store forwarding (partial memory) stall in alternatives 4, 6 and 7.
(define_insn "*movdf_internal"
[(set (match_operand:DF 0 "nonimmediate_operand"
"=Yf*f,m ,Yf*f,?Yd*r ,!o ,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,r ,Yi")
"=Yf*f,m ,Yf*f,?r ,!o,?*r ,!o,!o,?r,?m,?r,?r,v,v,v,m,*x,*x,*x,m ,r ,Yi")
(match_operand:DF 1 "general_operand"
"Yf*fm,Yf*f,G ,Yd*roF,Yd*rF,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x,Yj,r"))]
"Yf*fm,Yf*f,G ,roF,r ,*roF,*r,F ,rm,rC,C ,F ,C,v,m,v,C ,*x,m ,*x,Yj,r"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& (!can_create_pseudo_p ()
|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
......@@ -3087,7 +3115,7 @@
case TYPE_IMOV:
if (get_attr_mode (insn) == MODE_SI)
return "mov{l}\t{%1, %k0|%k0, %1}";
else if (which_alternative == 8)
else if (which_alternative == 11)
return "movabs{q}\t{%1, %0|%0, %1}";
else
return "mov{q}\t{%1, %0|%0, %1}";
......@@ -3133,31 +3161,31 @@
}
}
[(set (attr "isa")
(cond [(eq_attr "alternative" "3,4")
(cond [(eq_attr "alternative" "3,4,5,6,7")
(const_string "nox64")
(eq_attr "alternative" "5,6,7,8,17,18")
(eq_attr "alternative" "8,9,10,11,20,21")
(const_string "x64")
(eq_attr "alternative" "9,10,11,12")
(eq_attr "alternative" "12,13,14,15")
(const_string "sse2")
]
(const_string "*")))
(set (attr "type")
(cond [(eq_attr "alternative" "0,1,2")
(const_string "fmov")
(eq_attr "alternative" "3,4")
(eq_attr "alternative" "3,4,5,6,7")
(const_string "multi")
(eq_attr "alternative" "5,6,7,8")
(eq_attr "alternative" "8,9,10,11")
(const_string "imov")
(eq_attr "alternative" "9,13")
(eq_attr "alternative" "12,16")
(const_string "sselog1")
]
(const_string "ssemov")))
(set (attr "modrm")
(if_then_else (eq_attr "alternative" "8")
(if_then_else (eq_attr "alternative" "11")
(const_string "0")
(const_string "*")))
(set (attr "length_immediate")
(if_then_else (eq_attr "alternative" "8")
(if_then_else (eq_attr "alternative" "11")
(const_string "8")
(const_string "*")))
(set (attr "prefix")
......@@ -3171,13 +3199,13 @@
(const_string "1")
(const_string "*")))
(set (attr "mode")
(cond [(eq_attr "alternative" "3,4,7")
(cond [(eq_attr "alternative" "3,4,5,6,7,10")
(const_string "SI")
(eq_attr "alternative" "5,6,8,17,18")
(eq_attr "alternative" "8,9,11,20,21")
(const_string "DI")
/* xorps is one byte shorter for non-AVX targets. */
(eq_attr "alternative" "9,13")
(eq_attr "alternative" "12,16")
(cond [(not (match_test "TARGET_SSE2"))
(const_string "V4SF")
(match_test "TARGET_AVX512F")
......@@ -3196,7 +3224,7 @@
chains, otherwise use short move to avoid extra work. */
/* movaps is one byte shorter for non-AVX targets. */
(eq_attr "alternative" "10,14")
(eq_attr "alternative" "13,17")
(cond [(ior (match_operand 0 "ext_sse_reg_operand")
(match_operand 1 "ext_sse_reg_operand"))
(const_string "V8DF")
......@@ -3215,7 +3243,7 @@
/* For architectures resolving dependencies on register
parts we may avoid extra work to zero out upper part
of register. */
(eq_attr "alternative" "11,15")
(eq_attr "alternative" "14,18")
(cond [(not (match_test "TARGET_SSE2"))
(const_string "V2SF")
(match_test "TARGET_AVX")
......@@ -3225,11 +3253,19 @@
]
(const_string "DF"))
(and (eq_attr "alternative" "12,16")
(and (eq_attr "alternative" "15,19")
(not (match_test "TARGET_SSE2")))
(const_string "V2SF")
]
(const_string "DF")))])
(const_string "DF")))
(set (attr "preferred_for_size")
(cond [(eq_attr "alternative" "3,4")
(symbol_ref "false")]
(symbol_ref "true")))
(set (attr "preferred_for_speed")
(cond [(eq_attr "alternative" "3,4")
(symbol_ref "TARGET_INTEGER_DFMODE_MOVES")]
(symbol_ref "true")))])
(define_insn "*movsf_internal"
[(set (match_operand:SF 0 "nonimmediate_operand"
......@@ -4858,8 +4894,7 @@
(set (attr "preferred_for_speed")
(cond [(eq_attr "alternative" "1")
(symbol_ref "TARGET_INTER_UNIT_CONVERSIONS")]
(symbol_ref "true")))
])
(symbol_ref "true")))])
(define_insn "*float<SWI48x:mode><MODEF:mode>2_i387"
[(set (match_operand:MODEF 0 "register_operand" "=f")
......
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