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riscv-gcc-1
Commit a1450d5f by Segher Boessenkool Committed by Segher Boessenkool
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rs6000: Remove FIXED_SCRATCH 


	* config/rs6000/rs6000.h (FIXED_SCRATCH): Delete.

From-SVN: r249168
parent 2f5f2b57
Showing with 4 additions and 7 deletions
gcc/ChangeLog
2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> 2017-06-13 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.h (FIXED_SCRATCH): Delete.
2017-06-13 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/t-rtems: Don't handle SPE. * config/rs6000/t-rtems: Don't handle SPE.
2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> 2017-06-13 Segher Boessenkool <segher@kernel.crashing.org>
......
gcc/config/rs6000/rs6000.h
...@@ -1330,13 +1330,6 @@ enum data_align { align_abi, align_opt, align_both }; ...@@ -1330,13 +1330,6 @@ enum data_align { align_abi, align_opt, align_both };
#define LOGICAL_OP_NON_SHORT_CIRCUIT 0 #define LOGICAL_OP_NON_SHORT_CIRCUIT 0
/* A fixed register used at epilogue generation to address SPE registers
with negative offsets. The 64-bit load/store instructions on the SPE
only take positive offsets (and small ones at that), so we need to
reserve a register for consing up negative offsets. */
#define FIXED_SCRATCH 0
/* Specify the registers used for certain standard purposes. /* Specify the registers used for certain standard purposes.
The values of these macros are register numbers. */ The values of these macros are register numbers. */
......
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