Commit a0bd60d1 by David S. Miller Committed by David S. Miller

Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

	* config/sparc/sol2.h: Protect -m{cpu,tune}=native handling
	with a more complete cpp test.
	* config/sparc/linux64.h: Likewise.
	* config/sparc/linux.h: Likewise.
	* config/sparc/sparc.opt (sparc_debug): New target variable.
	(mdebug): New target option.
	* config/sparc/sparc.h (MASK_DEBUG_OPTIONS, MASK_DEBUG_ALL,
	TARGET_DEBUG_OPTIONS): New defines.
	* config/sparc/sparc.c (debug_target_flag_bits,
	debug_target_flags): New functions.
	(sparc_option_override): Add name strings back to cpu_table[].
	Parse -mdebug string.  When TARGET_DEBUG_OPTIONS is true, print
	out the target flags before and after override processing as well
	as the selected cpu.  If MASK_V8PLUS, make sure that the selected
	cpu is at least v9.

From-SVN: r180021
parent 6ff9d294
2011-10-14 David S. Miller <davem@davemloft.net>
* config/sparc/sol2.h: Protect -m{cpu,tune}=native handling
with a more complete cpp test.
* config/sparc/linux64.h: Likewise.
* config/sparc/linux.h: Likewise.
* config/sparc/sparc.opt (sparc_debug): New target variable.
(mdebug): New target option.
* config/sparc/sparc.h (MASK_DEBUG_OPTIONS, MASK_DEBUG_ALL,
TARGET_DEBUG_OPTIONS): New defines.
* config/sparc/sparc.c (debug_target_flag_bits,
debug_target_flags): New functions.
(sparc_option_override): Add name strings back to cpu_table[].
Parse -mdebug string. When TARGET_DEBUG_OPTIONS is true, print
out the target flags before and after override processing as well
as the selected cpu. If MASK_V8PLUS, make sure that the selected
cpu is at least v9.
2011-10-15 Oleg Endo <oleg.endo@t-online.de>
PR target/49263
......@@ -41,7 +41,7 @@ along with GCC; see the file COPYING3. If not see
/* -mcpu=native handling only makes sense with compiler running on
a SPARC chip. */
#if defined(__sparc__)
#if defined(__sparc__) && defined(__linux__)
extern const char *host_detect_local_cpu (int argc, const char **argv);
# define EXTRA_SPEC_FUNCTIONS \
{ "local_cpu_detect", host_detect_local_cpu },
......
......@@ -139,7 +139,7 @@ along with GCC; see the file COPYING3. If not see
/* -mcpu=native handling only makes sense with compiler running on
a SPARC chip. */
#if defined(__sparc__)
#if defined(__sparc__) && defined(__linux__)
extern const char *host_detect_local_cpu (int argc, const char **argv);
# define EXTRA_SPEC_FUNCTIONS \
{ "local_cpu_detect", host_detect_local_cpu },
......
......@@ -181,7 +181,7 @@ along with GCC; see the file COPYING3. If not see
/* -mcpu=native handling only makes sense with compiler running on
a SPARC chip. */
#if defined(__sparc__)
#if defined(__sparc__) && defined(__SVR4)
extern const char *host_detect_local_cpu (int argc, const char **argv);
# define EXTRA_SPEC_FUNCTIONS \
{ "local_cpu_detect", host_detect_local_cpu },
......
......@@ -700,6 +700,61 @@ char sparc_hard_reg_printed[8];
struct gcc_target targetm = TARGET_INITIALIZER;
static void
dump_target_flag_bits (const int flags)
{
if (flags & MASK_64BIT)
fprintf (stderr, "64BIT ");
if (flags & MASK_APP_REGS)
fprintf (stderr, "APP_REGS ");
if (flags & MASK_FASTER_STRUCTS)
fprintf (stderr, "FASTER_STRUCTS ");
if (flags & MASK_FLAT)
fprintf (stderr, "FLAT ");
if (flags & MASK_FMAF)
fprintf (stderr, "FMAF ");
if (flags & MASK_FPU)
fprintf (stderr, "FPU ");
if (flags & MASK_HARD_QUAD)
fprintf (stderr, "HARD_QUAD ");
if (flags & MASK_POPC)
fprintf (stderr, "POPC ");
if (flags & MASK_PTR64)
fprintf (stderr, "PTR64 ");
if (flags & MASK_STACK_BIAS)
fprintf (stderr, "STACK_BIAS ");
if (flags & MASK_UNALIGNED_DOUBLES)
fprintf (stderr, "UNALIGNED_DOUBLES ");
if (flags & MASK_V8PLUS)
fprintf (stderr, "V8PLUS ");
if (flags & MASK_VIS)
fprintf (stderr, "VIS ");
if (flags & MASK_VIS2)
fprintf (stderr, "VIS2 ");
if (flags & MASK_VIS3)
fprintf (stderr, "VIS3 ");
if (flags & MASK_DEPRECATED_V8_INSNS)
fprintf (stderr, "DEPRECATED_V8_INSNS ");
if (flags & MASK_LITTLE_ENDIAN)
fprintf (stderr, "LITTLE_ENDIAN ");
if (flags & MASK_SPARCLET)
fprintf (stderr, "SPARCLET ");
if (flags & MASK_SPARCLITE)
fprintf (stderr, "SPARCLITE ");
if (flags & MASK_V8)
fprintf (stderr, "V8 ");
if (flags & MASK_V9)
fprintf (stderr, "V9 ");
}
static void
dump_target_flags (const char *prefix, const int flags)
{
fprintf (stderr, "%s: (%08x) [ ", prefix, flags);
dump_target_flag_bits (flags);
fprintf(stderr, "]\n");
}
/* Validate and override various options, and do some machine dependent
initialization. */
......@@ -745,49 +800,93 @@ sparc_option_override (void)
/* Table of values for -m{cpu,tune}=. This must match the order of
the PROCESSOR_* enumeration. */
static struct cpu_table {
const char *const name;
const int disable;
const int enable;
} const cpu_table[] = {
{ MASK_ISA, 0 },
{ MASK_ISA, 0 },
{ MASK_ISA, MASK_V8 },
{ "v7", MASK_ISA, 0 },
{ "cypress", MASK_ISA, 0 },
{ "v8", MASK_ISA, MASK_V8 },
/* TI TMS390Z55 supersparc */
{ MASK_ISA, MASK_V8 },
{ MASK_ISA, MASK_V8|MASK_FPU },
{ "supersparc", MASK_ISA, MASK_V8 },
{ "hypersparc", MASK_ISA, MASK_V8|MASK_FPU },
/* LEON */
{ MASK_ISA, MASK_V8|MASK_FPU },
{ MASK_ISA, MASK_SPARCLITE },
{ "leon", MASK_ISA, MASK_V8|MASK_FPU },
{ "sparclite", MASK_ISA, MASK_SPARCLITE },
/* The Fujitsu MB86930 is the original sparclite chip, with no FPU. */
{ MASK_ISA|MASK_FPU, MASK_SPARCLITE },
{ "f930", MASK_ISA|MASK_FPU, MASK_SPARCLITE },
/* The Fujitsu MB86934 is the recent sparclite chip, with an FPU. */
{ MASK_ISA, MASK_SPARCLITE|MASK_FPU },
{ MASK_ISA|MASK_FPU, MASK_SPARCLITE },
{ MASK_ISA, MASK_SPARCLET },
{ "f934", MASK_ISA, MASK_SPARCLITE|MASK_FPU },
{ "sparclite86x", MASK_ISA|MASK_FPU, MASK_SPARCLITE },
{ "sparclet", MASK_ISA, MASK_SPARCLET },
/* TEMIC sparclet */
{ MASK_ISA, MASK_SPARCLET },
{ MASK_ISA, MASK_V9 },
{ "tsc701", MASK_ISA, MASK_SPARCLET },
{ "v9", MASK_ISA, MASK_V9 },
/* UltraSPARC I, II, IIi */
{ MASK_ISA,
{ "ultrasparc", MASK_ISA,
/* Although insns using %y are deprecated, it is a clear win. */
MASK_V9|MASK_DEPRECATED_V8_INSNS},
MASK_V9|MASK_DEPRECATED_V8_INSNS },
/* UltraSPARC III */
/* ??? Check if %y issue still holds true. */
{ MASK_ISA,
MASK_V9|MASK_DEPRECATED_V8_INSNS|MASK_VIS2},
{ "ultrasparc3", MASK_ISA,
MASK_V9|MASK_DEPRECATED_V8_INSNS|MASK_VIS2 },
/* UltraSPARC T1 */
{ MASK_ISA,
MASK_V9|MASK_DEPRECATED_V8_INSNS},
{ "niagara", MASK_ISA,
MASK_V9|MASK_DEPRECATED_V8_INSNS },
/* UltraSPARC T2 */
{ MASK_ISA, MASK_V9|MASK_POPC|MASK_VIS2},
{ "niagara2", MASK_ISA,
MASK_V9|MASK_POPC|MASK_VIS2 },
/* UltraSPARC T3 */
{ MASK_ISA, MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF},
{ "niagara3", MASK_ISA,
MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF },
/* UltraSPARC T4 */
{ MASK_ISA, MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF},
{ "niagara4", MASK_ISA,
MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF },
};
const struct cpu_table *cpu;
unsigned int i;
int fpu;
if (sparc_debug_string != NULL)
{
const char *q;
char *p;
p = ASTRDUP (sparc_debug_string);
while ((q = strtok (p, ",")) != NULL)
{
bool invert;
int mask;
p = NULL;
if (*q == '!')
{
invert = true;
q++;
}
else
invert = false;
if (! strcmp (q, "all"))
mask = MASK_DEBUG_ALL;
else if (! strcmp (q, "options"))
mask = MASK_DEBUG_OPTIONS;
else
error ("unknown -mdebug-%s switch", q);
if (invert)
sparc_debug &= ~mask;
else
sparc_debug |= mask;
}
}
if (TARGET_DEBUG_OPTIONS)
{
dump_target_flags("Initial target_flags", target_flags);
dump_target_flags("target_flags_explicit", target_flags_explicit);
}
#ifdef SUBTARGET_OVERRIDE_OPTIONS
SUBTARGET_OVERRIDE_OPTIONS;
#endif
......@@ -849,10 +948,25 @@ sparc_option_override (void)
gcc_assert (def->cpu != -1);
sparc_cpu_and_features = def->processor;
}
if ((target_flags & MASK_V8PLUS)
&& sparc_cpu_and_features < PROCESSOR_V9)
sparc_cpu_and_features = PROCESSOR_V9;
if (!global_options_set.x_sparc_cpu)
sparc_cpu = sparc_cpu_and_features;
cpu = &cpu_table[(int) sparc_cpu_and_features];
if (TARGET_DEBUG_OPTIONS)
{
fprintf (stderr, "sparc_cpu_and_features: %s\n", cpu->name);
fprintf (stderr, "sparc_cpu: %s\n",
cpu_table[(int) sparc_cpu].name);
dump_target_flags ("cpu->disable", cpu->disable);
dump_target_flags ("cpu->enable", cpu->enable);
}
target_flags &= ~cpu->disable;
target_flags |= (cpu->enable
#ifndef HAVE_AS_FMAF_HPC_VIS3
......@@ -976,6 +1090,9 @@ sparc_option_override (void)
target_flags |= MASK_LONG_DOUBLE_128;
#endif
if (TARGET_DEBUG_OPTIONS)
dump_target_flags ("Final target_flags", target_flags);
maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES,
((sparc_cpu == PROCESSOR_ULTRASPARC
|| sparc_cpu == PROCESSOR_NIAGARA
......
......@@ -1880,3 +1880,9 @@ extern int sparc_indent_opcode;
/* We use gcc _mcount for profiling. */
#define NO_PROFILE_COUNTERS 0
/* Debug support */
#define MASK_DEBUG_OPTIONS 0x01 /* debug option handling */
#define MASK_DEBUG_ALL MASK_DEBUG_OPTIONS
#define TARGET_DEBUG_OPTIONS (sparc_debug & MASK_DEBUG_OPTIONS)
......@@ -21,6 +21,10 @@
HeaderInclude
config/sparc/sparc-opts.h
;; Debug flags
TargetVariable
unsigned int sparc_debug
mfpu
Target Report Mask(FPU)
Use hardware FP
......@@ -180,6 +184,10 @@ mcmodel=
Target RejectNegative Joined Var(sparc_cmodel_string)
Use given SPARC-V9 code model
mdebug=
Target RejectNegative Joined Var(sparc_debug_string)
Enable debug output
mstd-struct-return
Target Report RejectNegative Var(sparc_std_struct_return)
Enable strict 32-bit psABI struct return checking.
......
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