Commit 9f8aa64a by Uros Bizjak Committed by Uros Bizjak

fpu-387.h (get_fpu_trap_exceptions): Add temporary variable to improve generated code.

	* config/fpu-387.h (get_fpu_trap_exceptions): Add temporary variable
	to improve generated code.

From-SVN: r226549
parent 22a49988
2015-08-04 Uros Bizjak <ubizjak@gmail.com>
* config/fpu-387.h (get_fpu_trap_exceptions): Add temporary variable
to improve generated code.
2015-08-04 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> 2015-08-04 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
PR fortran/64022 PR fortran/64022
......
...@@ -215,12 +215,13 @@ set_fpu (void) ...@@ -215,12 +215,13 @@ set_fpu (void)
int int
get_fpu_trap_exceptions (void) get_fpu_trap_exceptions (void)
{ {
int res = 0;
unsigned short cw; unsigned short cw;
int mask;
int res = 0;
__asm__ __volatile__ ("fstcw\t%0" : "=m" (cw)); __asm__ __volatile__ ("fstcw\t%0" : "=m" (cw));
cw &= _FPU_MASK_ALL; mask = cw;
if (has_sse()) if (has_sse())
{ {
unsigned int cw_sse; unsigned int cw_sse;
...@@ -228,15 +229,17 @@ get_fpu_trap_exceptions (void) ...@@ -228,15 +229,17 @@ get_fpu_trap_exceptions (void)
__asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse)); __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse));
/* The SSE exception masks are shifted by 7 bits. */ /* The SSE exception masks are shifted by 7 bits. */
cw = cw | ((cw_sse >> 7) & _FPU_MASK_ALL); mask |= (cw_sse >> 7);
} }
if (~cw & _FPU_MASK_IM) res |= GFC_FPE_INVALID; mask = ~mask & _FPU_MASK_ALL;
if (~cw & _FPU_MASK_DM) res |= GFC_FPE_DENORMAL;
if (~cw & _FPU_MASK_ZM) res |= GFC_FPE_ZERO; if (mask & _FPU_MASK_IM) res |= GFC_FPE_INVALID;
if (~cw & _FPU_MASK_OM) res |= GFC_FPE_OVERFLOW; if (mask & _FPU_MASK_DM) res |= GFC_FPE_DENORMAL;
if (~cw & _FPU_MASK_UM) res |= GFC_FPE_UNDERFLOW; if (mask & _FPU_MASK_ZM) res |= GFC_FPE_ZERO;
if (~cw & _FPU_MASK_PM) res |= GFC_FPE_INEXACT; if (mask & _FPU_MASK_OM) res |= GFC_FPE_OVERFLOW;
if (mask & _FPU_MASK_UM) res |= GFC_FPE_UNDERFLOW;
if (mask & _FPU_MASK_PM) res |= GFC_FPE_INEXACT;
return res; return res;
} }
...@@ -252,7 +255,7 @@ get_fpu_except_flags (void) ...@@ -252,7 +255,7 @@ get_fpu_except_flags (void)
{ {
unsigned short cw; unsigned short cw;
int excepts; int excepts;
int result = 0; int res = 0;
__asm__ __volatile__ ("fnstsw\t%0" : "=am" (cw)); __asm__ __volatile__ ("fnstsw\t%0" : "=am" (cw));
excepts = cw; excepts = cw;
...@@ -267,14 +270,14 @@ get_fpu_except_flags (void) ...@@ -267,14 +270,14 @@ get_fpu_except_flags (void)
excepts &= _FPU_EX_ALL; excepts &= _FPU_EX_ALL;
if (excepts & _FPU_MASK_IM) result |= GFC_FPE_INVALID; if (excepts & _FPU_MASK_IM) res |= GFC_FPE_INVALID;
if (excepts & _FPU_MASK_DM) result |= GFC_FPE_DENORMAL; if (excepts & _FPU_MASK_DM) res |= GFC_FPE_DENORMAL;
if (excepts & _FPU_MASK_ZM) result |= GFC_FPE_ZERO; if (excepts & _FPU_MASK_ZM) res |= GFC_FPE_ZERO;
if (excepts & _FPU_MASK_OM) result |= GFC_FPE_OVERFLOW; if (excepts & _FPU_MASK_OM) res |= GFC_FPE_OVERFLOW;
if (excepts & _FPU_MASK_UM) result |= GFC_FPE_UNDERFLOW; if (excepts & _FPU_MASK_UM) res |= GFC_FPE_UNDERFLOW;
if (excepts & _FPU_MASK_PM) result |= GFC_FPE_INEXACT; if (excepts & _FPU_MASK_PM) res |= GFC_FPE_INEXACT;
return result; return res;
} }
void void
......
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