Makefile.in (lcm.o): Depend on insn-attr.h.

	* Makefile.in (lcm.o): Depend on insn-attr.h.
	* basic-block.h (optimize_mode_switching): Declare.
	* lcm.c (tm_p.h, insn-attr.h): #include.
	(seginfo, bb_info): New structs.
	(antic, transp, comp, delete, insert) : New file-scope static variables.
	(new_seginfo, add_seginfo, make_preds_opaque, reg_dies): New functions.
	(reg_becomes_live, optimize_mode_switching): Likewise.
	* tm.texi: Add description of mode switching macros.
	* toplev.c (rest_of_compilation): Call optimize_mode_switching.

	* sh-protos.h (remove_dead_before_cse): Remove prototype.
	(fldi_ok, fpscr_set_from_mem): New prototypes.
	* sh.h (OPTIMIZATION_OPTION): Remove sh_flag_remove_dead_before_cse set.
	(CONST_DOUBLE_OK_FOR_LETTER_P, SECONDARY_INPUT_RELOAD_CLASS):
	Disable fldi for (TARGET_SH4 && ! TARGET_FMOVD).
	(sh_flag_remove_dead_before_cse): Remove declaration.
	(NUM_MODES_FOR_MODE_SWITCHING, OPTIMIZE_MODE_SWITCHING): New macros.
	(MODE_USES_IN_EXIT_BLOCK, MODE_NEEDED, MODE_AT_ENTRY): Likewise.
	(MODE_PRIORITY_TO_MODE, EMIT_MODE_SET): Likewise.
	* sh.c (broken_move): Disable fldi for (TARGET_SH4 && ! TARGET_FMOVD).
	(barrier_align): Allow for JUMP_INSNS containing a parallel.
	(machine_dependent_reorg): Remove sh_flag_remove_dead_before_cse set.
	(fldi_ok): New function.
	(get_fpscr_rtx): Add fpscr_rtx as GC root.
	(emit_sf_insn): Only generate fpu switches when optimize < 1.
	(emit_df_insn): Likewise.
	(expand_fp_branch, emit_fpscr_use, remove_dead_before_cse): Delete.
	(sh_flag_remove_dead_before_cse): Delete.
	(get_free_reg, fpscr_set_from_mem): New functions.
	* sh.md (movdf, movsf): Remove no_new_pseudos code.
	(return): Remove emit_fpscr_use / remove_dead_before_cse calls.

Co-Authored-By: Andrew MacLeod <amacleod@cygnus.com>

From-SVN: r31990

gcc/ChangeLog

+Tue Feb 15 22:30:36 2000  J"orn Rennecke <amylaar@cygnus.co.uk>
+                          Andrew MacLeod  <amacleod@cygnus.com>
+
+	* Makefile.in (lcm.o): Depend on insn-attr.h.
+	* basic-block.h (optimize_mode_switching): Declare.
+	* lcm.c (tm_p.h, insn-attr.h): #include.
+	(seginfo, bb_info): New structs.
+	(antic, transp, comp, delete, insert) : New file-scope static variables.
+	(new_seginfo, add_seginfo, make_preds_opaque, reg_dies): New functions.
+	(reg_becomes_live, optimize_mode_switching): Likewise.
+	* tm.texi: Add description of mode switching macros.
+	* toplev.c (rest_of_compilation): Call optimize_mode_switching.
+
+	* sh-protos.h (remove_dead_before_cse): Remove prototype.
+	(fldi_ok, fpscr_set_from_mem): New prototypes.
+	* sh.h (OPTIMIZATION_OPTION): Remove sh_flag_remove_dead_before_cse set.
+	(CONST_DOUBLE_OK_FOR_LETTER_P, SECONDARY_INPUT_RELOAD_CLASS):
+	Disable fldi for (TARGET_SH4 && ! TARGET_FMOVD).
+	(sh_flag_remove_dead_before_cse): Remove declaration.
+	(NUM_MODES_FOR_MODE_SWITCHING, OPTIMIZE_MODE_SWITCHING): New macros.
+	(MODE_USES_IN_EXIT_BLOCK, MODE_NEEDED, MODE_AT_ENTRY): Likewise.
+	(MODE_PRIORITY_TO_MODE, EMIT_MODE_SET): Likewise.
+	* sh.c (broken_move): Disable fldi for (TARGET_SH4 && ! TARGET_FMOVD).
+	(barrier_align): Allow for JUMP_INSNS containing a parallel.
+	(machine_dependent_reorg): Remove sh_flag_remove_dead_before_cse set.
+	(fldi_ok): New function.
+	(get_fpscr_rtx): Add fpscr_rtx as GC root.
+	(emit_sf_insn): Only generate fpu switches when optimize < 1.
+	(emit_df_insn): Likewise.
+	(expand_fp_branch, emit_fpscr_use, remove_dead_before_cse): Delete.
+	(sh_flag_remove_dead_before_cse): Delete.
+	(get_free_reg, fpscr_set_from_mem): New functions.
+	* sh.md (movdf, movsf): Remove no_new_pseudos code.
+	(return): Remove emit_fpscr_use / remove_dead_before_cse calls.
+
 2000-02-15  Loren Rittle  <ljrittle@acm.org>
 
 	* ginclude/stddef.h: Correct usage of _BSD_RUNE_T_ for FreeBSD.

gcc/Makefile.in

@@ -1567,7 +1567,7 @@ resource.o : resource.c $(CONFIG_H) $(RTL_H) hard-reg-set.h system.h \
    $(BASIC_BLOCK_H) $(REGS_H) flags.h output.h resource.h function.h toplev.h \
    insn-attr.h
 lcm.o : lcm.c $(CONFIG_H) system.h $(RTL_H) $(REGS_H) hard-reg-set.h flags.h \
-   real.h insn-config.h $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H)
+   real.h insn-config.h insn-attr.h $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H)
 profile.o : profile.c $(CONFIG_H) system.h $(RTL_H) flags.h insn-flags.h \
    gcov-io.h $(TREE_H) output.h $(REGS_H) toplev.h function.h insn-config.h \
    ggc.h

gcc/basic-block.h

@@ -435,6 +435,7 @@ extern struct edge_list *pre_edge_rev_lcm PARAMS ((FILE *, int, sbitmap *,
 						   sbitmap **));
 extern void compute_available		PARAMS ((sbitmap *, sbitmap *,
 						 sbitmap *, sbitmap *));
+extern void optimize_mode_switching	PARAMS ((FILE *));
 
 /* In emit-rtl.c.  */
 extern rtx emit_block_insn_after	PARAMS ((rtx, rtx, basic_block));

gcc/config/sh/sh-protos.h

 /* Definitions of target machine for GNU compiler for Hitachi Super-H.
-   Copyright (C) 1993-1998, 1999 Free Software Foundation, Inc.
+   Copyright (C) 1993-1999, 2000 Free Software Foundation, Inc.
    Contributed by Steve Chamberlain (sac@cygnus.com).
    Improved by Jim Wilson (wilson@cygnus.com).
 
@@ -109,4 +109,8 @@ extern void sh_expand_epilogue PARAMS ((void));
 extern void function_epilogue PARAMS ((FILE *, int));
 extern int initial_elimination_offset PARAMS ((int, int));
 extern void emit_fpscr_use PARAMS ((void));
-extern void remove_dead_before_cse PARAMS ((void));
+extern int fldi_ok PARAMS ((void));
+
+#ifdef HARD_CONST
+extern void fpscr_set_from_mem PARAMS ((int, HARD_REG_SET));
+#endif

gcc/config/sh/sh.h

 /* Definitions of target machine for GNU compiler for Hitachi Super-H.
-   Copyright (C) 1993-1998, 1999 Free Software Foundation, Inc.
+   Copyright (C) 1993-1999, 2000 Free Software Foundation, Inc.
    Contributed by Steve Chamberlain (sac@cygnus.com).
    Improved by Jim Wilson (wilson@cygnus.com).
 
@@ -204,8 +204,6 @@ extern int target_flags;
 do {									\
   if (LEVEL)								\
     flag_omit_frame_pointer = -1;					\
-  if (LEVEL)								\
-    sh_flag_remove_dead_before_cse = 1;					\
   if (SIZE)								\
     target_flags |= SPACE_BIT;						\
 } while (0)
@@ -756,9 +754,9 @@ extern enum reg_class reg_class_from_letter[];
 /* Similar, but for floating constants, and defining letters G and H.
    Here VALUE is the CONST_DOUBLE rtx itself.  */
 
-#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)	\
-((C) == 'G' ? fp_zero_operand (VALUE)		\
- : (C) == 'H' ? fp_one_operand (VALUE)		\
+#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)		\
+((C) == 'G' ? (fp_zero_operand (VALUE) && fldi_ok ())	\
+ : (C) == 'H' ? (fp_one_operand (VALUE) && fldi_ok ())	\
  : (C) == 'F')
 
 /* Given an rtx X being reloaded into a reg required to be
@@ -791,7 +789,8 @@ extern enum reg_class reg_class_from_letter[];
 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,X)  \
   ((((CLASS) == FP_REGS || (CLASS) == FP0_REGS || (CLASS) == DF_REGS)	\
     && immediate_operand ((X), (MODE))					\
-    && ! ((fp_zero_operand (X) || fp_one_operand (X)) && (MODE) == SFmode))\
+    && ! ((fp_zero_operand (X) || fp_one_operand (X))			\
+	  && (MODE) == SFmode && fldi_ok ()))				\
    ? R0_REGS								\
    : CLASS == FPUL_REGS && immediate_operand ((X), (MODE))		\
    ? (GET_CODE (X) == CONST_INT && CONST_OK_FOR_I (INTVAL (X))		\
@@ -2122,7 +2121,6 @@ sh_valid_machine_decl_attribute (DECL, ATTRIBUTES, IDENTIFIER, ARGS)
 #define PRAGMA_INSERT_ATTRIBUTES(node, pattr, prefix_attr) \
   sh_pragma_insert_attributes (node, pattr, prefix_attr)
 
-extern int sh_flag_remove_dead_before_cse;
 extern int rtx_equal_function_value_matters;
 extern struct rtx_def *fpscr_rtx;
 
@@ -2239,3 +2237,27 @@ do {									\
 
 #define SH_DYNAMIC_SHIFT_COST \
   (TARGET_HARD_SH4 ? 1 : TARGET_SH3 ? (TARGET_SMALLCODE ? 1 : 2) : 20)
+
+
+#define NUM_MODES_FOR_MODE_SWITCHING { FP_MODE_NONE }
+
+#define OPTIMIZE_MODE_SWITCHING(ENTITY) TARGET_SH4
+
+#define MODE_USES_IN_EXIT_BLOCK gen_rtx_USE (VOIDmode, get_fpscr_rtx ())
+
+#define MODE_NEEDED(ENTITY, INSN)					\
+  (recog_memoized (INSN) >= 0						\
+   ? get_attr_fp_mode (INSN)						\
+   : (GET_CODE (PATTERN (INSN)) == USE				\
+      && rtx_equal_p (XEXP (PATTERN (INSN), 0), get_fpscr_rtx ()))	\
+   ? (TARGET_FPU_SINGLE ? FP_MODE_SINGLE : FP_MODE_DOUBLE)		\
+   : FP_MODE_NONE)
+
+#define MODE_AT_ENTRY(ENTITY) \
+  (TARGET_FPU_SINGLE ? FP_MODE_SINGLE : FP_MODE_DOUBLE)
+
+#define MODE_PRIORITY_TO_MODE(ENTITY, N) \
+  ((TARGET_FPU_SINGLE != 0) ^ (N) ? FP_MODE_SINGLE : FP_MODE_DOUBLE)
+
+#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE) \
+  fpscr_set_from_mem ((MODE), (HARD_REGS_LIVE))

gcc/config/sh/sh.md

@@ -2812,18 +2812,7 @@
   if (prepare_move_operands (operands, DFmode)) DONE;
   if (TARGET_SH4)
     {
-      if (no_new_pseudos)
-	{
-	  /* ??? FIXME: This is only a stopgap fix.  There is no guarantee
-	     that fpscr is in the right state. */
-	  emit_insn (gen_movdf_i4 (operands[0], operands[1], get_fpscr_rtx ()));
-	  DONE;
-	}
       emit_df_insn (gen_movdf_i4 (operands[0], operands[1], get_fpscr_rtx ()));
-      /* We need something to tag possible REG_LIBCALL notes on to.  */
-      if (TARGET_FPU_SINGLE && rtx_equal_function_value_matters
-	  && GET_CODE (operands[0]) == REG)
-	emit_insn (gen_mov_nop (operands[0]));
       DONE;
     }
 }")
@@ -2910,18 +2899,7 @@
     DONE;
   if (TARGET_SH3E)
     {
-      if (no_new_pseudos)
-	{
-	  /* ??? FIXME: This is only a stopgap fix.  There is no guarantee
-	     that fpscr is in the right state. */
-	  emit_insn (gen_movsf_ie (operands[0], operands[1], get_fpscr_rtx ()));
-	  DONE;
-	}
       emit_sf_insn (gen_movsf_ie (operands[0], operands[1], get_fpscr_rtx ()));
-      /* We need something to tag possible REG_LIBCALL notes on to.  */
-      if (! TARGET_FPU_SINGLE && rtx_equal_function_value_matters
-	  && GET_CODE (operands[0]) == REG)
-	emit_insn (gen_mov_nop (operands[0]));
       DONE;
     }
 }")
@@ -3415,9 +3393,7 @@
 ;; that doesn't mix with emitting a prologue.
 (define_insn "return"
   [(return)]
-  "emit_fpscr_use (),
-   remove_dead_before_cse (),
-   reload_completed"
+  "reload_completed"
   "%@	%#"
   [(set_attr "type" "return")
    (set_attr "needs_delay_slot" "yes")])

gcc/tm.texi

@@ -37,6 +37,7 @@ includes @file{tm.h} and most compiler source files include
 * Assembler Format::    Defining how to write insns and pseudo-ops to output.
 * Debugging Info::      Defining the format of debugging output.
 * Cross-compilation::   Handling floating point for cross-compilers.
+* Mode Switching::      Insertion of mode-switching instructions.
 * Misc::                Everything else.
 @end menu
 
@@ -7194,6 +7195,85 @@ The value is in the target machine's representation for mode @var{mode}
 and has the type @code{REAL_VALUE_TYPE}.
 @end table
 
+@node Mode Switching
+@section Mode Switching Instructions
+@cindex mode switching
+The following macros control mode switching optimizations:
+
+@table @code
+@findex OPTIMIZE_MODE_SWITCHING
+@item OPTIMIZE_MODE_SWITCHING (@var{entity})
+Define this macro if the port needs extra instructions inserted for mode
+switching in an optimizing compilation.
+
+For an example, the SH4 can perform both single and double precision
+floating point operations, but to perform a single precision operation,
+the FPSCR PR bit has to be cleared, while for a double precision
+operation, this bit has to be set.  Changing the PR bit requires a general
+purpose register as a scratch register, hence these FPSCR sets have to
+be inserted before reload, i.e. you can't put this into instruction emitting
+or MACHINE_DEPENDENT_REORG.
+
+You can have multiple entities that are mode-switched, and select at run time
+which entities actually need it.  @code{OPTIMIZE_MODE_SWITCHING} should
+return non-zero for any @var{entity} that that needs mode-switching.
+If you define this macro, you also have to define
+@code{NUM_MODES_FOR_MODE_SWITCHING}, @code{MODE_NEEDED},
+@code{MODE_PRIORITY_TO_MODE} and @code{EMIT_MODE_SET}.
+@code{MODE_AT_ENTRY} and @code{MODE_USES_IN_EXIT_BLOCK} are optional.
+
+@findex NUM_MODES_FOR_MODE_SWITCHING
+@item NUM_MODES_FOR_MODE_SWITCHING
+If you define @code{OPTIMIZE_MODE_SWITCHING}, you have to define this as
+initializer for an array of integers.  Each initializer element
+N refers to an entity that needs mode switching, and specifies the number
+of different modes that might need to be set for this entity.
+The position of the initializer in the initializer - starting counting at
+zero - determines the integer that is used to refer to the mode-switched
+entity in question.
+In macros that take mode arguments / yield a mode result, modes are
+represented as numbers 0 .. N - 1.  N is used to specify that no mode
+switch is needed / supplied.
+
+@findex MODE_USES_IN_EXIT_BLOCK
+@item MODE_USES_IN_EXIT_BLOCK
+If this macro is defined, it is called for each exit block when mode switching
+optimization is performed.  Its return value should be the pattern of an insn,
+or a sequence of insns.  It is emitted before the return insn / use insns at
+the end of the exit block.
+
+This is done before insns are examined for their need of any mode switching.
+
+@findex MODE_NEEDED
+@item MODE_NEEDED (@var{entity}, @var{insn})
+@var{entity} is an integer specifying a mode-switched entity.  If
+@code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to
+return an integer value not larger than the corresponding element in
+NUM_MODES_FOR_MODE_SWITCHING, to denote the mode that @var{entity} must
+be switched into prior to the execution of INSN.
+
+@findex MODE_AT_ENTRY
+@item MODE_AT_ENTRY (@var{entity})
+If this macro is defined, it is evaluated for every @var{entity} that needs
+mode switching.  It should evaluate to an integer, which is a mode that
+@var{entity} is assumed to be switched to at function entry.
+
+@findex MODE_PRIORITY_TO_MODE
+@item MODE_PRIORITY_TO_MODE (@var{entity}, @var{n})
+This macro specifies the order in which modes for ENTITY are processed.
+0 is the highest priority, NUM_MODES_FOR_MODE_SWITCHING[ENTITY] - 1 the
+lowest.  The value of the macro should be an integer designating a mode
+for ENTITY.  For any fixed @var{entity}, @code{mode_priority_to_mode}
+(@var{entity}, @var{n}) shall be a bijection in 0 ..
+@code{num_modes_for_mode_switching}[@var{entity}] - 1 .
+
+@findex EMIT_MODE_SET
+@item EMIT_MODE_SET (@var{entity}, @var{mode}, @var{hard_regs_live})
+Generate one or more insns to set @var{entity} to @var{mode}.
+@var{hard_reg_live} is the set of hard registers live at the point where
+the insn(s) are to be inserted.
+@end table
+
 @node Misc
 @section Miscellaneous Parameters
 @cindex parameters, miscellaneous

gcc/toplev.c

@@ -3305,6 +3305,11 @@ rest_of_compilation (decl)
   /* Print function header into sched dump now
      because doing the sched analysis makes some of the dump.  */
 
+  if (optimize && n_basic_blocks)
+    {
+      optimize_mode_switching (NULL_PTR);
+    }
+
 #ifdef INSN_SCHEDULING
   if (optimize > 0 && flag_schedule_insns)
     {