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riscv-gcc-1
Commit 9e98c8c3 by Renlin Li Committed by Jiong Wang
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[AARCH64] Add ACLE 2.0 predefined macros 

2014-10-15  Renlin Li <renlin.li@arm.com>

	* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
	__ARM_BIG_ENDIAN, __ARM_SIZEOF_MINIMAL_ENUM. Add __ARM_64BIT_STATE,
	__ARM_ARCH_ISA_A64, __ARM_FEATURE_CLZ, __ARM_FEATURE_IDIV,
	__ARM_FEATURE_UNALIGNED, __ARM_PCS_AAPCS64, __ARM_SIZEOF_WCHAR_T.

From-SVN: r216267
parent 42e52a51
Showing with 23 additions and 2 deletions
gcc/ChangeLog
2014-10-15 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
__ARM_BIG_ENDIAN, __ARM_SIZEOF_MINIMAL_ENUM. Add __ARM_64BIT_STATE,
__ARM_ARCH_ISA_A64, __ARM_FEATURE_CLZ, __ARM_FEATURE_IDIV,
__ARM_FEATURE_UNALIGNED, __ARM_PCS_AAPCS64, __ARM_SIZEOF_WCHAR_T.
2014-10-15 Richard Biener <rguenther@suse.de>
* gimple-fold.c (gimple_fold_call): Properly keep virtual
gcc/config/aarch64/aarch64.h
......@@ -26,9 +26,23 @@
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
builtin_define ("__aarch64__"); \
builtin_define ("__aarch64__"); \
builtin_define ("__ARM_64BIT_STATE"); \
builtin_define ("__ARM_ARCH_ISA_A64"); \
builtin_define ("__ARM_FEATURE_CLZ"); \
builtin_define ("__ARM_FEATURE_IDIV"); \
builtin_define ("__ARM_FEATURE_UNALIGNED"); \
builtin_define ("__ARM_PCS_AAPCS64"); \
builtin_define_with_int_value \
("__ARM_SIZEOF_WCHAR_T", WCHAR_TYPE_SIZE / 8); \
builtin_define_with_int_value \
("__ARM_SIZEOF_MINIMAL_ENUM", \
flag_short_enums? 1 : 4); \
if (TARGET_BIG_END) \
builtin_define ("__AARCH64EB__"); \
{ \
builtin_define ("__AARCH64EB__"); \
builtin_define ("__ARM_BIG_ENDIAN"); \
} \
else \
builtin_define ("__AARCH64EL__"); \
\
......
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