Commit 9e64a0bf by Greta Yorsh Committed by Greta Yorsh

Committed as obvious.

2013-04-30  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/thumb2.md: Remove trailing whitespaces.

From-SVN: r198464
parent d6b28156
2013-04-30 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/thumb2.md: Remove trailing whitespaces.
2013-04-30 Richard Sandiford <rsandifo@linux.vnet.ibm.com> 2013-04-30 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
* explow.c (plus_constant): Pass "mode" to immed_double_int_const. * explow.c (plus_constant): Pass "mode" to immed_double_int_const.
......
...@@ -50,7 +50,7 @@ ...@@ -50,7 +50,7 @@
(set_attr "length" "6,10")] (set_attr "length" "6,10")]
) )
;; Thumb-2 only allows shift by constant on data processing instructions ;; Thumb-2 only allows shift by constant on data processing instructions
(define_insn "*thumb_andsi_not_shiftsi_si" (define_insn "*thumb_andsi_not_shiftsi_si"
[(set (match_operand:SI 0 "s_register_operand" "=r") [(set (match_operand:SI 0 "s_register_operand" "=r")
(and:SI (not:SI (match_operator:SI 4 "shift_operator" (and:SI (not:SI (match_operator:SI 4 "shift_operator"
...@@ -330,7 +330,7 @@ ...@@ -330,7 +330,7 @@
[(set_attr "conds" "clob")] [(set_attr "conds" "clob")]
) )
;; Don't define thumb2_load_indirect_jump because we can't guarantee label ;; Don't define thumb2_load_indirect_jump because we can't guarantee label
;; addresses will have the thumb bit set correctly. ;; addresses will have the thumb bit set correctly.
(define_insn "*thumb2_and_scc" (define_insn "*thumb2_and_scc"
...@@ -401,7 +401,7 @@ ...@@ -401,7 +401,7 @@
(define_insn "*thumb2_cond_arith" (define_insn "*thumb2_cond_arith"
[(set (match_operand:SI 0 "s_register_operand" "=r,r") [(set (match_operand:SI 0 "s_register_operand" "=r,r")
(match_operator:SI 5 "shiftable_operator" (match_operator:SI 5 "shiftable_operator"
[(match_operator:SI 4 "arm_comparison_operator" [(match_operator:SI 4 "arm_comparison_operator"
[(match_operand:SI 2 "s_register_operand" "r,r") [(match_operand:SI 2 "s_register_operand" "r,r")
(match_operand:SI 3 "arm_rhs_operand" "rI,rI")]) (match_operand:SI 3 "arm_rhs_operand" "rI,rI")])
...@@ -864,7 +864,7 @@ ...@@ -864,7 +864,7 @@
else else
return \"cmp\\t%0, #0\;beq\\t%l1\"; return \"cmp\\t%0, #0\;beq\\t%l1\";
" "
[(set (attr "length") [(set (attr "length")
(if_then_else (if_then_else
(and (ge (minus (match_dup 1) (pc)) (const_int 2)) (and (ge (minus (match_dup 1) (pc)) (const_int 2))
(le (minus (match_dup 1) (pc)) (const_int 128)) (le (minus (match_dup 1) (pc)) (const_int 128))
...@@ -887,7 +887,7 @@ ...@@ -887,7 +887,7 @@
else else
return \"cmp\\t%0, #0\;bne\\t%l1\"; return \"cmp\\t%0, #0\;bne\\t%l1\";
" "
[(set (attr "length") [(set (attr "length")
(if_then_else (if_then_else
(and (ge (minus (match_dup 1) (pc)) (const_int 2)) (and (ge (minus (match_dup 1) (pc)) (const_int 2))
(le (minus (match_dup 1) (pc)) (const_int 128)) (le (minus (match_dup 1) (pc)) (const_int 128))
......
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