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riscv-gcc-1
Commit 9e0fa36a by Peter Bergner Committed by Peter Bergner
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x86intrin.h: Change #warning to #error. 

	* config/rs6000/x86intrin.h: Change #warning to #error. Update message.
	* config/rs6000/emmintrin.h: Likewise.
	* config/rs6000/mmintrin.h: Likewise.
	* config/rs6000/xmmintrin.h: Likewise.

From-SVN: r256452
parent d90a2542
Showing with 11 additions and 4 deletions
gcc/ChangeLog
2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
* config/rs6000/x86intrin.h: Change #warning to #error. Update message.
* config/rs6000/emmintrin.h: Likewise.
* config/rs6000/mmintrin.h: Likewise.
* config/rs6000/xmmintrin.h: Likewise.
2018-01-10 David Malcolm <dmalcolm@redhat.com> 2018-01-10 David Malcolm <dmalcolm@redhat.com>
PR c++/43486 PR c++/43486
......
gcc/config/rs6000/emmintrin.h
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
the PowerISA FPSCR / VSCR registers. We recommend applications the PowerISA FPSCR / VSCR registers. We recommend applications
replace direct access to the MXSCR with the more portable <fenv.h> replace direct access to the MXSCR with the more portable <fenv.h>
Posix APIs. */ Posix APIs. */
#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." #error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error."
#endif #endif
#ifndef EMMINTRIN_H_ #ifndef EMMINTRIN_H_
......
gcc/config/rs6000/mmintrin.h
...@@ -49,7 +49,7 @@ ...@@ -49,7 +49,7 @@
C language 64-bit scalar operation or optimized to use the newer C language 64-bit scalar operation or optimized to use the newer
128-bit SSE/Altivec operations. We recomend this for new 128-bit SSE/Altivec operations. We recomend this for new
applications. */ applications. */
#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." #error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error."
#endif #endif
#ifndef _MMINTRIN_H_INCLUDED #ifndef _MMINTRIN_H_INCLUDED
......
gcc/config/rs6000/x86intrin.h
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
Note that much code that uses Intel intrinsics can be rewritten in Note that much code that uses Intel intrinsics can be rewritten in
standard C or GNU C extensions, which are more portable and better standard C or GNU C extensions, which are more portable and better
optimized across multiple targets. */ optimized across multiple targets. */
#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." #error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error."
#endif #endif
#ifndef _X86INTRIN_H_INCLUDED #ifndef _X86INTRIN_H_INCLUDED
......
gcc/config/rs6000/xmmintrin.h
...@@ -51,7 +51,7 @@ ...@@ -51,7 +51,7 @@
the PowerISA FPSCR / VSCR registers. We recommend applications the PowerISA FPSCR / VSCR registers. We recommend applications
replace direct access to the MXSCR with the more portable <fenv.h> replace direct access to the MXSCR with the more portable <fenv.h>
Posix APIs. */ Posix APIs. */
#warning "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this warning." #error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error."
#endif #endif
#ifndef _XMMINTRIN_H_INCLUDED #ifndef _XMMINTRIN_H_INCLUDED
......
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