vreinterpret.c: Fix typo in comment.

* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Fix typo in comment.

From-SVN: r236382

gcc/testsuite/ChangeLog

 2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>
 
+	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Fix typo
+	in comment.
+
+2016-05-18  Christophe Lyon  <christophe.lyon@linaro.org>
+
 	* gcc.target/aarch64/noplt_3.c: Scan for "br\t".
 	* gcc.target/aarch64/tail_indirect_call_1.c: Scan for "br\t",
 	"blr\t" and switch to scan-assembler-times.

gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c

@@ -405,7 +405,7 @@ VECT_VAR_DECL(expected_q_f32_9,hfloat,32,4) [] = { 0xf3f2f1f0, 0xf7f6f5f4,
 VECT_VAR_DECL(expected_q_f32_10,hfloat,32,4) [] = { 0xfff1fff0, 0xfff3fff2,
 						    0xfff5fff4, 0xfff7fff6 };
 
-/* Expected results for vreinterpretq_xx_f32.  */
+/* Expected results for vreinterpret_xx_f32.  */
 VECT_VAR_DECL(expected_xx_f32_1,int,8,8) [] = { 0x0, 0x0, 0x80, 0xc1,
 						0x0, 0x0, 0x70, 0xc1 };
 VECT_VAR_DECL(expected_xx_f32_2,int,16,4) [] = { 0x0, 0xc180, 0x0, 0xc170 };