Skip to content

R
riscv-gcc-1
Commit 9d6193a7 by Chen Liqin Committed by Chen Liqin
Options

config.gcc (score-*-elf): add extra_parts .., update tmake_file, extra_objs. 

	* config.gcc (score-*-elf): add extra_parts .., update tmake_file, extra_objs.
	* config/score/score3.c: Delete.
	* config/score/score3.h: Delete.
	* config/score/mul-div.S: Delete.
	* config/score/sfp-machine.h: Add new file.
	* config/score/constraints.md: Add new file.
	* config/score/t-score-softfp: Add new file.
	* config/score/t-score-elf: Remove score3.o and multilib generate.
	* config/score/score7.c (score7_const_ok_for_letter_p): Delete.
	(score7_extra_constraint): Delete.
	(score7_option_override): Remove unused code which mode to constraint.md.
	* config/score/score.c: Remove score3 and score5 define and code.
	* config/score/score.h: Remove score3 and score5 define and code.
	* config/score/score.md: Remove score3 template and unusal insn generate.
	* config/score/score.opt: Remove score3 and score5 options.

From-SVN: r170864
parent fdc1806a
Showing with 202 additions and 386 deletions
gcc/ChangeLog
2011-03-11 Chen Liqin <liqin.gcc@gmail.com>
* config.gcc (score-*-elf): add extra_parts .., update tmake_file, extra_objs.
* config/score/score3.c: Delete.
* config/score/score3.h: Delete.
* config/score/mul-div.S: Delete.
* config/score/sfp-machine.h: Add new file.
* config/score/constraints.md: Add new file.
* config/score/t-score-softfp: Add new file.
* config/score/t-score-elf: Remove score3.o and multilib generate.
* config/score/score7.c (score7_const_ok_for_letter_p): Delete.
(score7_extra_constraint): Delete.
(score7_option_override): Remove unused code which mode to constraint.md.
* config/score/score.c: Remove score3 and score5 define and code.
* config/score/score.h: Remove score3 and score5 define and code.
* config/score/score.md: Remove score3 template and unusal insn generate.
* config/score/score.opt: Remove score3 and score5 options.
2011-03-10 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> 2011-03-10 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
* config/pa/pa-hpux10.h (TARGET_OS_CPP_BUILTINS): Define _REENTRANT * config/pa/pa-hpux10.h (TARGET_OS_CPP_BUILTINS): Define _REENTRANT
......
gcc/config.gcc
...@@ -2306,9 +2306,12 @@ s390x-ibm-tpf*) ...@@ -2306,9 +2306,12 @@ s390x-ibm-tpf*)
extra_options="${extra_options} s390/tpf.opt" extra_options="${extra_options} s390/tpf.opt"
;; ;;
score-*-elf) score-*-elf)
gas=yes
gnu_ld=yes
tm_file="dbxelf.h elfos.h score/elf.h score/score.h newlib-stdint.h" tm_file="dbxelf.h elfos.h score/elf.h score/score.h newlib-stdint.h"
tmake_file=score/t-score-elf extra_parts="crti.o crtn.o crtbegin.o crtend.o"
extra_objs="score7.o score3.o" tmake_file="${tmake_file} score/t-score-elf score/t-score-softfp soft-fp/t-softfp"
extra_objs="score7.o"
;; ;;
sh-*-elf* | sh[12346l]*-*-elf* | \ sh-*-elf* | sh[12346l]*-*-elf* | \
sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
......
gcc/config/score/constraints.md 0 → 100644
;; Constraint definitions for S+CORE
;; Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
;; Contributed by Sunnorth.
;; This file is part of GCC.
;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published
;; by the Free Software Foundation; either version 3, or (at your
;; option) any later version.
;; GCC is distributed in the hope that it will be useful, but WITHOUT
;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
;; License for more details.
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>. */
;; -------------------------------------------------------------------------
;; Constraints
;; -------------------------------------------------------------------------
;; Register constraints.
(define_register_constraint "d" "G32_REGS"
"r0 to r31")
(define_register_constraint "e" "G16_REGS"
"r0 to r15")
(define_register_constraint "t" "T32_REGS"
"r8 to r11 | r22 to r27")
(define_register_constraint "h" "HI_REG"
"hi")
(define_register_constraint "l" "LO_REG"
"lo")
(define_register_constraint "x" "CE_REGS"
"hi + lo")
(define_register_constraint "q" "CN_REG"
"cnt")
(define_register_constraint "y" "LC_REG"
"lcb")
(define_register_constraint "z" "SC_REG"
"scb")
(define_register_constraint "a" "SP_REGS"
"cnt + lcb + scb")
(define_register_constraint "c" "CR_REGS"
"cr0 to cr15")
;; Integer constant constraints.
(define_constraint "I"
"High 16-bit constant (32-bit constant with 16 LSBs zero)."
(and (match_code "const_int")
(match_test "(ival & 0xffff) == 0")))
(define_constraint "J"
"Unsigned 5 bit integer (in the range 0 to 31)."
(and (match_code "const_int")
(match_test "ival >= 0 && ival <= 31")))
(define_constraint "K"
"Unsigned 16 bit integer (in the range 0 to 65535)."
(and (match_code "const_int")
(match_test "ival >= 0 && ival <= 65535")))
(define_constraint "L"
"Signed 16 bit integer (in the range −32768 to 32767)."
(and (match_code "const_int")
(match_test "ival >= -32768 && ival <= 32767")))
(define_constraint "M"
"Unsigned 14 bit integer (in the range 0 to 16383)."
(and (match_code "const_int")
(match_test "ival >= 0 && ival <= 16383")))
(define_constraint "N"
"Signed 14 bit integer (in the range −8192 to 8191)."
(and (match_code "const_int")
(match_test "ival >= -8192 && ival <= 8191")))
(define_constraint "Z"
"Any SYMBOL_REF."
(and (match_code "symbol_ref")
(match_test "GET_CODE (op) == SYMBOL_REF")))
gcc/config/score/crti.asm
# crti.asm for Sunplus S+CORE # crti.asm for Sunplus S+CORE
# #
# Copyright (C) 2005, 2009 Free Software Foundation, Inc. # Copyright (C) 2005, 2009, 2010 Free Software Foundation, Inc.
# #
# This file is free software; you can redistribute it and/or modify it # This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the # under the terms of the GNU General Public License as published by the
......
gcc/config/score/crtn.asm
# crtn.asm for Sunplus S+CORE # crtn.asm for Sunplus S+CORE
# Copyright (C) 2005, 2009 Free Software Foundation, Inc. # Copyright (C) 2005, 2009, 2010 Free Software Foundation, Inc.
# #
# This file is free software; you can redistribute it and/or modify it # This file is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the # under the terms of the GNU General Public License as published by the
......
gcc/config/score/score-generic.md
;; Machine description for Sunplus S+CORE ;; Machine description for Sunplus S+CORE
;; Sunplus S+CORE Pipeline Description ;; Sunplus S+CORE Pipeline Description
;; Copyright (C) 2005, 2007 ;; Copyright (C) 2005, 2007, 2010
;; Free Software Foundation, Inc. ;; Free Software Foundation, Inc.
;; Contributed by Sunnorth. ;; Contributed by Sunnorth.
......
gcc/config/score/score-modes.def
/* score-modes.def for Sunplus S+CORE processor /* score-modes.def for Sunplus S+CORE processor
Copyright (C) 2005, 2007 Free Software Foundation, Inc. Copyright (C) 2005, 2007, 2010 Free Software Foundation, Inc.
This file is part of GCC. This file is part of GCC.
......
gcc/config/score/score.h
...@@ -20,14 +20,9 @@ ...@@ -20,14 +20,9 @@
#include "score-conv.h" #include "score-conv.h"
#undef CPP_SPEC
#define CPP_SPEC "%{mscore3:-D__score3__} %{G*}"
#undef CC1_SPEC #undef CC1_SPEC
#define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \ #define CC1_SPEC "%{!mel:-meb} %{mel:-mel } \
%{!mscore*:-mscore7} \ %{!mscore*:-mscore7} \
%{mscore3:-mscore3} \
%{mscore3d:-mscore3d} \
%{mscore7:-mscore7} \ %{mscore7:-mscore7} \
%{mscore7d:-mscore7d} \ %{mscore7d:-mscore7d} \
%{G*}" %{G*}"
...@@ -37,14 +32,8 @@ ...@@ -37,14 +32,8 @@
%{!mscore*:-march=score7} \ %{!mscore*:-march=score7} \
%{mscore7:-march=score7} \ %{mscore7:-march=score7} \
%{mscore7d:-march=score7} \ %{mscore7d:-march=score7} \
%{mscore3:-march=score3} \
%{mscore3d:-march=score3} \
%{march=score5:-march=score7} \
%{march=score5u:-march=score7} \
%{march=score7:-march=score7} \ %{march=score7:-march=score7} \
%{march=score7d:-march=score7} \ %{march=score7d:-march=score7} \
%{march=score3:-march=score3} \
%{march=score3d:-march=score3} \
%{G*}" %{G*}"
#undef LINK_SPEC #undef LINK_SPEC
...@@ -52,14 +41,8 @@ ...@@ -52,14 +41,8 @@
%{!mscore*:-mscore7_elf} \ %{!mscore*:-mscore7_elf} \
%{mscore7:-mscore7_elf} \ %{mscore7:-mscore7_elf} \
%{mscore7d:-mscore7_elf} \ %{mscore7d:-mscore7_elf} \
%{mscore3:-mscore3_elf} \
%{mscore3d:-mscore3_elf} \
%{march=score5:-mscore7_elf} \
%{march=score5u:-mscore7_elf} \
%{march=score7:-mscore7_elf} \ %{march=score7:-mscore7_elf} \
%{march=score7d:-mscore7_elf} \ %{march=score7d:-mscore7_elf} \
%{march=score3:-mscore3_elf} \
%{march=score3d:-mscore3_elf} \
%{G*}" %{G*}"
/* Run-time Target Specification. */ /* Run-time Target Specification. */
...@@ -72,18 +55,10 @@ ...@@ -72,18 +55,10 @@
builtin_define ("__scorele__"); \ builtin_define ("__scorele__"); \
else \ else \
builtin_define ("__scorebe__"); \ builtin_define ("__scorebe__"); \
if (TARGET_SCORE5) \
builtin_define ("__score5__"); \
if (TARGET_SCORE5U) \
builtin_define ("__score5u__"); \
if (TARGET_SCORE7) \ if (TARGET_SCORE7) \
builtin_define ("__score7__"); \ builtin_define ("__score7__"); \
if (TARGET_SCORE7D) \ if (TARGET_SCORE7D) \
builtin_define ("__score7d__"); \ builtin_define ("__score7d__"); \
if (TARGET_SCORE3) \
builtin_define ("__score3__"); \
if (TARGET_SCORE3D) \
builtin_define ("__score3d__"); \
} while (0) } while (0)
#define TARGET_DEFAULT 0 #define TARGET_DEFAULT 0
...@@ -466,25 +441,6 @@ extern enum reg_class score_char_to_class[256]; ...@@ -466,25 +441,6 @@ extern enum reg_class score_char_to_class[256];
(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
? reg_classes_intersect_p (HI_REG, (CLASS)) : 0) ? reg_classes_intersect_p (HI_REG, (CLASS)) : 0)
/* The letters I, J, K, L, M, N, O, and P in a register constraint
string can be used to stand for particular ranges of immediate
operands. This macro defines what the ranges are. C is the
letter, and VALUE is a constant value. Return 1 if VALUE is
in the range specified by C. */
#define CONST_OK_FOR_LETTER_P(VALUE, C) score_const_ok_for_letter_p (VALUE, C)
/* Similar, but for floating constants, and defining letters G and H.
Here VALUE is the CONST_DOUBLE rtx itself. */
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'G' && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
/* Letters in the range `Q' through `U' may be defined in a
machine-dependent fashion to stand for arbitrary operand types.
The machine description macro `EXTRA_CONSTRAINT' is passed the
operand as its first argument and the constraint letter as its
second operand. */
#define EXTRA_CONSTRAINT(VALUE, C) score_extra_constraint (VALUE, C)
/* Basic Stack Layout. */ /* Basic Stack Layout. */
/* Stack layout; function entry, exit and calling. */ /* Stack layout; function entry, exit and calling. */
...@@ -514,6 +470,7 @@ extern enum reg_class score_char_to_class[256]; ...@@ -514,6 +470,7 @@ extern enum reg_class score_char_to_class[256];
/* The register that holds the return address in exception handlers. */ /* The register that holds the return address in exception handlers. */
#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM) #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, EH_REGNUM)
#define EH_RETURN_HANDLER_RTX gen_rtx_REG (SImode, 30)
/* Registers That Address the Stack Frame. */ /* Registers That Address the Stack Frame. */
/* Register to use for pushing function arguments. */ /* Register to use for pushing function arguments. */
...@@ -615,14 +572,6 @@ typedef struct score_args ...@@ -615,14 +572,6 @@ typedef struct score_args
fprintf (FILE, " jl _mcount \n"); \ fprintf (FILE, " jl _mcount \n"); \
fprintf (FILE, " .set nor1 \n"); \ fprintf (FILE, " .set nor1 \n"); \
} \ } \
else if (TARGET_SCORE3) \
{ \
fprintf (FILE, " .set r1 \n"); \
fprintf (FILE, " mv! r%d,r%d \n", AT_REGNUM, RA_REGNUM); \
fprintf (FILE, " addi! r%d, %d \n", STACK_POINTER_REGNUM, -8);\
fprintf (FILE, " jl _mcount \n"); \
fprintf (FILE, " .set nor1 \n"); \
} \
} while (0) } while (0)
/* Trampolines for Nested Functions. */ /* Trampolines for Nested Functions. */
...@@ -825,9 +774,6 @@ typedef struct score_args ...@@ -825,9 +774,6 @@ typedef struct score_args
fprintf (STREAM, "\tpush! %s,[%s]\n", \ fprintf (STREAM, "\tpush! %s,[%s]\n", \
reg_names[REGNO], \ reg_names[REGNO], \
reg_names[STACK_POINTER_REGNUM]); \ reg_names[STACK_POINTER_REGNUM]); \
else if (TARGET_SCORE3) \
fprintf (STREAM, "\tpush!\t%s\n", \
reg_names[REGNO]); \
} while (0) } while (0)
/* This is how to output an insn to pop a register from the stack. */ /* This is how to output an insn to pop a register from the stack. */
...@@ -837,9 +783,6 @@ typedef struct score_args ...@@ -837,9 +783,6 @@ typedef struct score_args
fprintf (STREAM, "\tpop! %s,[%s]\n", \ fprintf (STREAM, "\tpop! %s,[%s]\n", \
reg_names[REGNO], \ reg_names[REGNO], \
reg_names[STACK_POINTER_REGNUM]); \ reg_names[STACK_POINTER_REGNUM]); \
else if (TARGET_SCORE3) \
fprintf (STREAM, "\tpop!\t%s\n", \
reg_names[REGNO]); \
} while (0) } while (0)
/* Output of Dispatch Tables. */ /* Output of Dispatch Tables. */
...@@ -852,28 +795,6 @@ typedef struct score_args ...@@ -852,28 +795,6 @@ typedef struct score_args
fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \ fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
else \ else \
fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \ fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
else if (TARGET_SCORE3) \
{ \
switch (GET_MODE(BODY)) \
{ \
case QImode: /* TBB */ \
asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d_tbb)/2\n", \
VALUE, REL); \
break; \
case HImode: /* TBH */ \
asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d_tbb)/2\n", \
VALUE, REL); \
break; \
case SImode: \
if (flag_pic) \
fprintf (STREAM, "\t.gpword %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
else \
fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE); \
break; \
default: \
gcc_unreachable(); \
} \
} \
} while (0) } while (0)
/* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */ /* Jump table alignment is explicit in ASM_OUTPUT_CASE_LABEL. */
...@@ -894,13 +815,6 @@ typedef struct score_args ...@@ -894,13 +815,6 @@ typedef struct score_args
for the index in the tablejump instruction. */ for the index in the tablejump instruction. */
#define CASE_VECTOR_MODE SImode #define CASE_VECTOR_MODE SImode
#define CASE_VECTOR_PC_RELATIVE (TARGET_SCORE3)
#define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
((min < 0 || max >= 0x2000 || TARGET_SCORE7) ? SImode \
: (max >= 0x200) ? HImode \
: QImode)
/* This is how to output an element of a case-vector that is absolute. */ /* This is how to output an element of a case-vector that is absolute. */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE) fprintf (STREAM, "\t.word %sL%d\n", LOCAL_LABEL_PREFIX, VALUE)
......
gcc/config/score/score.opt
; Options for the Sunnorth port of the compiler. ; Options for the Sunnorth port of the compiler.
; Copyright (C) 2005, 2007 Free Software Foundation, Inc. ; Copyright (C) 2005, 2007, 2010 Free Software Foundation, Inc.
; ;
; This file is part of GCC. ; This file is part of GCC.
; ;
...@@ -34,14 +34,6 @@ muls ...@@ -34,14 +34,6 @@ muls
Target RejectNegative Report Mask(ULS) Target RejectNegative Report Mask(ULS)
Enable unaligned load/store instruction Enable unaligned load/store instruction
mscore5
Target RejectNegative Report Mask(SCORE5)
Support SCORE 5 ISA
mscore5u
Target RejectNegative Report Mask(SCORE5U)
Support SCORE 5U ISA
mscore7 mscore7
Target RejectNegative Report Mask(SCORE7) Target RejectNegative Report Mask(SCORE7)
Support SCORE 7 ISA Support SCORE 7 ISA
...@@ -50,14 +42,6 @@ mscore7d ...@@ -50,14 +42,6 @@ mscore7d
Target RejectNegative Report Mask(SCORE7D) Target RejectNegative Report Mask(SCORE7D)
Support SCORE 7D ISA Support SCORE 7D ISA
mscore3
Target RejectNegative Report Mask(SCORE3)
Support SCORE 3 ISA
mscore3d
Target RejectNegative Report Mask(SCORE3D)
Support SCORE 3d ISA
march= march=
Target RejectNegative Joined Target RejectNegative Joined
Specify the name of the target architecture Specify the name of the target architecture
gcc/config/score/score3.h deleted 100644 → 0
/* score3.h for Sunplus S+CORE processor
Copyright (C) 2005, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
Contributed by Sunnorth
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#ifndef GCC_SCORE3_H
#define GCC_SCORE3_H
enum score3_address_type
{
SCORE3_ADD_REG,
SCORE3_ADD_CONST_INT,
SCORE3_ADD_SYMBOLIC
};
struct score3_frame_info
{
HOST_WIDE_INT total_size; /* bytes that the entire frame takes up */
HOST_WIDE_INT var_size; /* bytes that variables take up */
HOST_WIDE_INT args_size; /* bytes that outgoing arguments take up */
HOST_WIDE_INT gp_reg_size; /* bytes needed to store gp regs */
HOST_WIDE_INT gp_sp_offset; /* offset from new sp to store gp registers */
HOST_WIDE_INT cprestore_size; /* # bytes that the .cprestore slot takes up */
unsigned int mask; /* mask of saved gp registers */
int num_gp; /* number of gp registers saved */
};
struct score3_arg_info
{
unsigned int num_bytes; /* The argument's size in bytes */
unsigned int reg_words; /* The number of words passed in registers */
unsigned int reg_offset; /* The offset of the first register from */
/* GP_ARG_FIRST or FP_ARG_FIRST etc */
unsigned int stack_words; /* The number of words that must be passed */
/* on the stack */
unsigned int stack_offset; /* The offset from the start of the stack */
/* overflow area */
};
#ifdef RTX_CODE
struct score3_address_info
{
enum score3_address_type type;
rtx reg;
rtx offset;
enum rtx_code code;
enum score_symbol_type symbol_type;
};
#endif
#define SCORE3_SDATA_MAX score3_sdata_max
#define SCORE3_STACK_ALIGN(LOC) (((LOC) + 3) & ~3)
#define SCORE3_PROLOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
#define SCORE3_EPILOGUE_TEMP_REGNUM (GP_REG_FIRST + 8)
#define SCORE3_DEFAULT_SDATA_MAX 8
extern int score3_symbolic_constant_p (rtx x,
enum score_symbol_type *symbol_type);
extern bool score3_return_in_memory (const_tree type,
const_tree fndecl ATTRIBUTE_UNUSED);
extern void score3_output_mi_thunk (FILE *file,
tree thunk_fndecl ATTRIBUTE_UNUSED,
HOST_WIDE_INT delta,
HOST_WIDE_INT vcall_offset,
tree function);
extern rtx score3_legitimize_address (rtx x);
extern void
score3_function_prologue (FILE *file,
HOST_WIDE_INT size ATTRIBUTE_UNUSED);
extern void
score3_function_epilogue (FILE *file,
HOST_WIDE_INT size ATTRIBUTE_UNUSED);
extern section *score3_select_rtx_section (enum machine_mode mode, rtx x,
unsigned HOST_WIDE_INT align);
extern bool score3_in_small_data_p (const_tree decl);
extern void score3_asm_file_start (void);
extern void score3_asm_file_end (void);
extern void score3_option_override (void);
extern int score3_reg_class (int regno);
extern enum reg_class score3_preferred_reload_class (rtx x ATTRIBUTE_UNUSED,
enum reg_class rclass);
extern enum reg_class
score3_secondary_reload_class (enum reg_class rclass,
enum machine_mode mode ATTRIBUTE_UNUSED,
rtx x);
extern int score3_const_ok_for_letter_p (HOST_WIDE_INT value, char c);
extern int score3_extra_constraint (rtx op, char c);
extern int score3_hard_regno_mode_ok (unsigned int regno,
enum machine_mode mode);
extern HOST_WIDE_INT
score3_initial_elimination_offset (int from,
int to ATTRIBUTE_UNUSED);
extern void score3_function_arg_advance (CUMULATIVE_ARGS *cum,
enum machine_mode mode,
const_tree type,
bool named);
extern int score3_arg_partial_bytes (CUMULATIVE_ARGS *cum,
enum machine_mode mode,
tree type,
bool named);
extern rtx score3_function_arg (const CUMULATIVE_ARGS *cum,
enum machine_mode mode,
const_tree type,
bool named);
extern rtx score3_function_value (const_tree valtype,
const_tree func ATTRIBUTE_UNUSED,
enum machine_mode mode);
extern void score3_asm_trampoline_template (FILE *);
extern void score3_trampoline_init (rtx, tree, rtx);
extern int score3_regno_mode_ok_for_base_p (int regno, int strict);
extern bool score3_legitimate_address_p (enum machine_mode mode, rtx x,
bool strict);
extern int score3_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
enum reg_class from,
enum reg_class to);
extern bool score3_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed);
extern int score3_address_cost (rtx addr);
extern int score3_output_external (FILE *file ATTRIBUTE_UNUSED,
tree decl,
const char *name);
extern rtx score3_return_addr (int count, rtx frame ATTRIBUTE_UNUSED);
extern void score3_print_operand (FILE *file, rtx op, int c);
extern void score3_print_operand_address (FILE *file, rtx x);
extern enum machine_mode
score3_select_cc_mode (enum rtx_code op, rtx x, rtx y);
extern void score3_prologue (void);
extern void score3_epilogue (int sibcall_p);
extern void score3_call (rtx *ops, bool sib);
extern void score3_call_value (rtx *ops, bool sib);
extern void score3_movsicc (rtx *ops);
extern void score3_movdi (rtx *ops);
extern void score3_zero_extract_andi (rtx *ops);
extern const char * score3_select_add_imm (rtx *ops, bool set_cc);
extern const char * score3_select (rtx *ops, const char *inst_pre, bool commu,
const char *letter, bool set_cc);
extern const char * score3_move (rtx *ops);
extern const char * score3_limm (rtx *ops);
extern const char *
score3_linsn (rtx *ops, enum score_mem_unit unit, bool sign);
extern const char *
score3_sinsn (rtx *ops, enum score_mem_unit unit);
extern const char * score3_output_casesi (rtx *operands);
extern const char * score3_rpush (rtx *ops);
extern const char * score3_rpop (rtx *ops);
#endif
gcc/config/score/score7.c
...@@ -340,7 +340,7 @@ score7_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, ...@@ -340,7 +340,7 @@ score7_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED,
if (delta != 0) if (delta != 0)
{ {
rtx offset = GEN_INT (delta); rtx offset = GEN_INT (delta);
if (!CONST_OK_FOR_LETTER_P (delta, 'L')) if (!(delta >= -32768 && delta <= 32767))
{ {
emit_move_insn (temp1, offset); emit_move_insn (temp1, offset);
offset = temp1; offset = temp1;
...@@ -638,31 +638,8 @@ void ...@@ -638,31 +638,8 @@ void
score7_option_override (void) score7_option_override (void)
{ {
flag_pic = false; flag_pic = false;
if (!flag_pic) score7_sdata_max = SCORE7_DEFAULT_SDATA_MAX;
score7_sdata_max = (global_options_set.x_g_switch_value
? g_switch_value
: SCORE7_DEFAULT_SDATA_MAX);
else
{
score7_sdata_max = 0;
if (global_options_set.x_g_switch_value && (g_switch_value != 0))
warning (0, "-fPIC and -G are incompatible");
}
score_char_to_class['d'] = G32_REGS;
score_char_to_class['e'] = G16_REGS;
score_char_to_class['t'] = T32_REGS;
score_char_to_class['h'] = HI_REG;
score_char_to_class['l'] = LO_REG;
score_char_to_class['x'] = CE_REGS;
score_char_to_class['q'] = CN_REG;
score_char_to_class['y'] = LC_REG;
score_char_to_class['z'] = SC_REG;
score_char_to_class['a'] = SP_REGS;
score_char_to_class['c'] = CR_REGS;
} }
/* Implement REGNO_REG_CLASS macro. */ /* Implement REGNO_REG_CLASS macro. */
...@@ -710,42 +687,6 @@ score7_secondary_reload_class (enum reg_class rclass, ...@@ -710,42 +687,6 @@ score7_secondary_reload_class (enum reg_class rclass,
return NO_REGS; return NO_REGS;
} }
/* Implement CONST_OK_FOR_LETTER_P macro. */
/* imm constraints
I imm16 << 16
J uimm5
K uimm16
L simm16
M uimm14
N simm14 */
int
score7_const_ok_for_letter_p (HOST_WIDE_INT value, char c)
{
switch (c)
{
case 'I': return ((value & 0xffff) == 0);
case 'J': return IMM_IN_RANGE (value, 5, 0);
case 'K': return IMM_IN_RANGE (value, 16, 0);
case 'L': return IMM_IN_RANGE (value, 16, 1);
case 'M': return IMM_IN_RANGE (value, 14, 0);
case 'N': return IMM_IN_RANGE (value, 14, 1);
default : return 0;
}
}
/* Implement EXTRA_CONSTRAINT macro. */
/* Z symbol_ref */
int
score7_extra_constraint (rtx op, char c)
{
switch (c)
{
case 'Z':
return GET_CODE (op) == SYMBOL_REF;
default:
gcc_unreachable ();
}
}
/* Return truth value on whether or not a given hard register /* Return truth value on whether or not a given hard register
can support a given mode. */ can support a given mode. */
...@@ -884,7 +825,6 @@ score7_asm_trampoline_template (FILE *f) ...@@ -884,7 +825,6 @@ score7_asm_trampoline_template (FILE *f)
void void
score7_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) score7_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
{ {
#define FFCACHE "_flush_cache"
#define CODE_SIZE (TRAMPOLINE_INSNS * UNITS_PER_WORD) #define CODE_SIZE (TRAMPOLINE_INSNS * UNITS_PER_WORD)
rtx fnaddr = XEXP (DECL_RTL (fndecl), 0); rtx fnaddr = XEXP (DECL_RTL (fndecl), 0);
...@@ -899,11 +839,6 @@ score7_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -899,11 +839,6 @@ score7_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
mem = adjust_address (m_tramp, SImode, CODE_SIZE + GET_MODE_SIZE (SImode)); mem = adjust_address (m_tramp, SImode, CODE_SIZE + GET_MODE_SIZE (SImode));
emit_move_insn (mem, chain_value); emit_move_insn (mem, chain_value);
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, FFCACHE),
LCT_NORMAL, VOIDmode, 2,
addr, Pmode,
GEN_INT (TRAMPOLINE_SIZE), SImode);
#undef FFCACHE
#undef CODE_SIZE #undef CODE_SIZE
} }
...@@ -1018,28 +953,28 @@ score7_rtx_costs (rtx x, int code, int outer_code, int *total, ...@@ -1018,28 +953,28 @@ score7_rtx_costs (rtx x, int code, int outer_code, int *total,
case CONST_INT: case CONST_INT:
if (outer_code == SET) if (outer_code == SET)
{ {
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I') if (((INTVAL (x) & 0xffff) == 0)
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'L')) || (INTVAL (x) >= -32768 && INTVAL (x) <= 32767))
*total = COSTS_N_INSNS (1); *total = COSTS_N_INSNS (1);
else else
*total = COSTS_N_INSNS (2); *total = COSTS_N_INSNS (2);
} }
else if (outer_code == PLUS || outer_code == MINUS) else if (outer_code == PLUS || outer_code == MINUS)
{ {
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'N')) if (INTVAL (x) >= -8192 && INTVAL (x) <= 8191)
*total = 0; *total = 0;
else if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I') else if (((INTVAL (x) & 0xffff) == 0)
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'L')) || (INTVAL (x) >= -32768 && INTVAL (x) <= 32767))
*total = 1; *total = 1;
else else
*total = COSTS_N_INSNS (2); *total = COSTS_N_INSNS (2);
} }
else if (outer_code == AND || outer_code == IOR) else if (outer_code == AND || outer_code == IOR)
{ {
if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'M')) if (INTVAL (x) >= 0 && INTVAL (x) <= 16383)
*total = 0; *total = 0;
else if (CONST_OK_FOR_LETTER_P (INTVAL (x), 'I') else if (((INTVAL (x) & 0xffff) == 0)
|| CONST_OK_FOR_LETTER_P (INTVAL (x), 'K')) || (INTVAL (x) >= 0 && INTVAL (x) <= 65535))
*total = 1; *total = 1;
else else
*total = COSTS_N_INSNS (2); *total = COSTS_N_INSNS (2);
...@@ -1456,7 +1391,7 @@ score7_prologue (void) ...@@ -1456,7 +1391,7 @@ score7_prologue (void)
{ {
rtx insn; rtx insn;
if (CONST_OK_FOR_LETTER_P (-size, 'L')) if (size >= -32768 && size <= 32767)
EMIT_PL (emit_insn (gen_add3_insn (stack_pointer_rtx, EMIT_PL (emit_insn (gen_add3_insn (stack_pointer_rtx,
stack_pointer_rtx, stack_pointer_rtx,
GEN_INT (-size)))); GEN_INT (-size))));
...@@ -1511,7 +1446,7 @@ score7_epilogue (int sibcall_p) ...@@ -1511,7 +1446,7 @@ score7_epilogue (int sibcall_p)
if (size) if (size)
{ {
if (CONST_OK_FOR_LETTER_P (size, 'L')) if (size >= -32768 && size <= 32767)
emit_insn (gen_add3_insn (base, base, GEN_INT (size))); emit_insn (gen_add3_insn (base, base, GEN_INT (size)));
else else
{ {
...@@ -1714,7 +1649,7 @@ score7_pr_addr_post (rtx *ops, int idata, int iaddr, char *ip, enum score_mem_un ...@@ -1714,7 +1649,7 @@ score7_pr_addr_post (rtx *ops, int idata, int iaddr, char *ip, enum score_mem_un
{ {
HOST_WIDE_INT offset = INTVAL (ai.offset); HOST_WIDE_INT offset = INTVAL (ai.offset);
if (SCORE_ALIGN_UNIT (offset, unit) if (SCORE_ALIGN_UNIT (offset, unit)
&& CONST_OK_FOR_LETTER_P (offset >> unit, 'J')) && (((offset >> unit) >= 0) && ((offset >> unit) <= 31)))
{ {
ops[iaddr] = ai.offset; ops[iaddr] = ai.offset;
return snprintf (ip, INS_BUF_SZ, return snprintf (ip, INS_BUF_SZ,
......
gcc/config/score/sfp-machine.h 0 → 100644
#define _FP_W_TYPE_SIZE 32
#define _FP_W_TYPE unsigned long
#define _FP_WS_TYPE signed long
#define _FP_I_TYPE long
/* The type of the result of a floating point comparison. This must
match `__libgcc_cmp_return__' in GCC for the target. */
typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
#define CMPtype __gcc_CMPtype
#define _FP_MUL_MEAT_S(R,X,Y) \
_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
#define _FP_MUL_MEAT_D(R,X,Y) \
_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
#define _FP_MUL_MEAT_Q(R,X,Y) \
_FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y)
#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
#define _FP_NANSIGN_S 0
#define _FP_NANSIGN_D 0
#define _FP_NANSIGN_Q 0
#define _FP_KEEPNANFRACP 1
/* Someone please check this. */
#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
do { \
if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
{ \
R##_s = Y##_s; \
_FP_FRAC_COPY_##wc(R,Y); \
} \
else \
{ \
R##_s = X##_s; \
_FP_FRAC_COPY_##wc(R,X); \
} \
R##_c = FP_CLS_NAN; \
} while (0)
#define __LITTLE_ENDIAN 1234
#define __BIG_ENDIAN 4321
# define __BYTE_ORDER __BIG_ENDIAN
/* Define ALIASNAME as a strong alias for NAME. */
# define strong_alias(name, aliasname) _strong_alias(name, aliasname)
# define _strong_alias(name, aliasname) \
extern __typeof (name) aliasname __attribute__ ((alias (#name)));
gcc/config/score/t-score-elf
...@@ -19,17 +19,10 @@ ...@@ -19,17 +19,10 @@
# Additional Backend Files # Additional Backend Files
score7.o: $(srcdir)/config/score/score7.c $(CONFIG_H) $(SYSTEM_H) \ score7.o: $(srcdir)/config/score/score7.c $(CONFIG_H) $(SYSTEM_H) \
coretypes.h $(TM_H) $(RTL_H) output.h flags.h $(TREE_H) \ coretypes.h $(TM_H) $(RTL_H) output.h flags.h $(TREE_H) \
expr.h $(TM_P_H) expr.h toplev.h $(TM_P_H)
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/score/score7.c $(srcdir)/config/score/score7.c
score3.o: $(srcdir)/config/score/score3.c $(CONFIG_H) $(SYSTEM_H) \
coretypes.h $(TM_H) $(RTL_H) output.h flags.h $(TREE_H) \
expr.h $(TM_P_H)
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
$(srcdir)/config/score/score3.c
# Assemble startup files. # Assemble startup files.
$(T)crti.o: $(srcdir)/config/score/crti.asm $(GCC_PASSES) $(T)crti.o: $(srcdir)/config/score/crti.asm $(GCC_PASSES)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
...@@ -38,33 +31,3 @@ $(T)crti.o: $(srcdir)/config/score/crti.asm $(GCC_PASSES) ...@@ -38,33 +31,3 @@ $(T)crti.o: $(srcdir)/config/score/crti.asm $(GCC_PASSES)
$(T)crtn.o: $(srcdir)/config/score/crtn.asm $(GCC_PASSES) $(T)crtn.o: $(srcdir)/config/score/crtn.asm $(GCC_PASSES)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
-c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/score/crtn.asm -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/score/crtn.asm
LIB1ASMSRC = score/mul-div.S
LIB1ASMFUNCS = _mulsi3 _divsi3 _flush_cache
FPBIT = fp-bit.c
DPBIT = dp-bit.c
# If any special flags are necessary when building libgcc2 put them here.
TARGET_LIBGCC2_CFLAGS = -g
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#define FLOAT' > fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
cat $(srcdir)/config/fp-bit.c > dp-bit.c
# We must build libgcc2.a with -G 0, in case the user wants to link
# without the $gp register.
TARGET_LIBGCC2_CFLAGS = -G 0
MULTILIB_OPTIONS = mscore3 mel
MULTILIB_MATCHES = mscore3=march?score3
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
gcc/config/score/t-score-softfp 0 → 100644
softfp_float_modes := sf df
softfp_int_modes := si di
softfp_extensions := sfdf
softfp_truncations := dfsf
softfp_machine_header := score/sfp-machine.h
softfp_exclude_libgcc2 := y
# softfp seems to be missing a whole bunch of prototypes.
TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment