altivec.md (altivec_eq<mode>): Remove star.

2018-08-30  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/altivec.md (altivec_eq<mode>): Remove star.
	(altivec_vcmpequ<VI_char>_p): Remove star.
	* config/rs6000/rs6000-string.c (do_load_for_compare): Support
	vector load modes.
	(expand_strncmp_vec_sequence): New function.
	(emit_final_str_compare_vec): New function.
	(expand_strn_compare): Add support for vector strncmp.
	* config/rs6000/rs6000.opt (-mstring-compare-inline-limit): Change
	length specification to bytes.
	* config/rs6000/vsx.md (vsx_ld_elemrev_v16qi_internal): Remove star.
	(vcmpnezb_p): New pattern.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Update documentation
	for option -mstring-compare-inline-limit.

From-SVN: r263991

gcc/ChangeLog

+2018-08-30  Aaron Sawdey  <acsawdey@linux.ibm.com>
+
+	* config/rs6000/altivec.md (altivec_eq<mode>): Remove star.
+	(altivec_vcmpequ<VI_char>_p): Remove star.
+	* config/rs6000/rs6000-string.c (do_load_for_compare): Support
+	vector load modes.
+	(expand_strncmp_vec_sequence): New function.
+	(emit_final_str_compare_vec): New function.
+	(expand_strn_compare): Add support for vector strncmp.
+	* config/rs6000/rs6000.opt (-mstring-compare-inline-limit): Change
+	length specification to bytes.
+	* config/rs6000/vsx.md (vsx_ld_elemrev_v16qi_internal): Remove star.
+	(vcmpnezb_p): New pattern.
+	* doc/invoke.texi (RS/6000 and PowerPC Options): Update documentation
+	for option -mstring-compare-inline-limit.
+
 2018-08-30  Thiago Macieira  <thiago.macieira@intel.com>
 
 	* config/i386/i386.c (PTA_WESTMERE): Remove PTA_AES.

gcc/config/rs6000/altivec.md

@@ -603,7 +603,7 @@
   "vcmpbfp %0,%1,%2"
   [(set_attr "type" "veccmp")])
 
-(define_insn "*altivec_eq<mode>"
+(define_insn "altivec_eq<mode>"
   [(set (match_operand:VI2 0 "altivec_register_operand" "=v")
 	(eq:VI2 (match_operand:VI2 1 "altivec_register_operand" "v")
 		(match_operand:VI2 2 "altivec_register_operand" "v")))]
@@ -2304,7 +2304,7 @@
 
 ;; Compare vectors producing a vector result and a predicate, setting CR6 to
 ;; indicate a combined status
-(define_insn "*altivec_vcmpequ<VI_char>_p"
+(define_insn "altivec_vcmpequ<VI_char>_p"
   [(set (reg:CC CR6_REGNO)
 	(unspec:CC [(eq:CC (match_operand:VI2 1 "register_operand" "v")
 			   (match_operand:VI2 2 "register_operand" "v"))]

gcc/config/rs6000/rs6000.opt

@@ -334,8 +334,8 @@ Target Report Var(rs6000_block_compare_inline_loop_limit) Init(-1) RejectNegativ
 Max number of bytes to compare with loops.
 
 mstring-compare-inline-limit=
-Target Report Var(rs6000_string_compare_inline_limit) Init(8) RejectNegative Joined UInteger Save
-Max number of pairs of load insns for compare.
+Target Report Var(rs6000_string_compare_inline_limit) Init(64) RejectNegative Joined UInteger Save
+Max number of bytes to compare.
 
 misel
 Target Report Mask(ISEL) Var(rs6000_isa_flags)

gcc/config/rs6000/vsx.md

@@ -1412,7 +1412,7 @@
     }
 })
 
-(define_insn "*vsx_ld_elemrev_v16qi_internal"
+(define_insn "vsx_ld_elemrev_v16qi_internal"
   [(set (match_operand:V16QI 0 "vsx_register_operand" "=wa")
         (vec_select:V16QI
           (match_operand:V16QI 1 "memory_operand" "Z")
@@ -5051,6 +5051,22 @@
   "vcmpnezb %0,%1,%2"
   [(set_attr "type" "vecsimple")])
 
+;; Vector Compare Not Equal or Zero Byte predicate or record-form
+(define_insn "vcmpnezb_p"
+  [(set (reg:CC CR6_REGNO)
+	(unspec:CC
+	 [(match_operand:V16QI 1 "altivec_register_operand" "v")
+	  (match_operand:V16QI 2 "altivec_register_operand" "v")]
+	 UNSPEC_VCMPNEZB))
+   (set (match_operand:V16QI 0 "altivec_register_operand" "=v")
+	(unspec:V16QI
+	 [(match_dup 1)
+	  (match_dup 2)]
+	 UNSPEC_VCMPNEZB))]
+  "TARGET_P9_VECTOR"
+  "vcmpnezb. %0,%1,%2"
+  [(set_attr "type" "vecsimple")])
+
 ;; Vector Compare Not Equal Half Word (specified/not+eq:)
 (define_insn "vcmpneh"
   [(set (match_operand:V8HI 0 "altivec_register_operand" "=v")

gcc/doc/invoke.texi

@@ -24556,12 +24556,10 @@ target-specific.
 
 @item -mstring-compare-inline-limit=@var{num}
 @opindex mstring-compare-inline-limit
-Generate at most @var{num} pairs of load instructions to compare the
-string inline. If the difference or end of string is not found at the
+Compare at most @var{num} string bytes with inline code.
+If the difference or end of string is not found at the
 end of the inline compare a call to @code{strcmp} or @code{strncmp} will
-take care of the rest of the comparison. The default is 8 pairs of
-loads, which will compare 64 bytes on a 64-bit target and 32 bytes on a
-32-bit target.
+take care of the rest of the comparison. The default is 64 bytes.
 
 @item -G @var{num}
 @opindex G